. Quartus 14.1
 . Modelsim 10.4
 . Modelsim 6.6c path now includes '6.6c' as subdir.
-Note: dop233 has local mods that point to its own install dirs.

 waves and write them to HEX files used by the block gens;
-Added dp_stream_rec_play to apertif_unb1_correlator to record the WPFB output;
-Added tc_wpfb_src_out_arr.py to read and plot the recorded WPFB output;
 . Not working yet - the WPFB output does not resemble s spectrum.
-Commented out the correlator as the WPFB is now the main DUT.

Happy holidays!

-Added clock generation to mmm_apertif_unb1_correlator (for sim);
-Added werkplan.

Use same string lenght for all g_mode options, to avoid warning on always false in if statement when lengths do not match.

Redefined write flush modes. Now the flush is still under control by dvr_flush_en, and disabled when kept tied to '0'.

Clarified clock domains and use ctlr_clk_out and ctlr_clk_in to make ctlr_clk available in same delta-cycle.

Instantiate tech_ddr_lib.tech_ddr_memory_model. Use dp_clk for rd and wr. DDR3 access starts but diagnostic result fails.diff