Added multi test bench

libraries/io/ddr/hdllib.cfg

@@ -16,6 +16,7 @@ synth_files =
 
 test_bench_files = 
     tb/vhdl/tb_io_ddr.vhd
+    tb/vhdl/tb_tb_io_ddr.vhd
 
 modelsim_search_libraries =
     altera_ver lpm_ver sgate_ver altera_mf_ver altera_lnsim_ver stratixiv_ver stratixiv_hssi_ver stratixiv_pcie_hip_ver

libraries/io/ddr/tb/vhdl/tb_tb_io_ddr.vhd

+-------------------------------------------------------------------------------
+--
+-- Copyright (C) 2014
+-- ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
+-- P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
+--
+-- This program is free software: you can redistribute it and/or modify
+-- it under the terms of the GNU General Public License as published by
+-- the Free Software Foundation, either version 3 of the License, or
+-- (at your option) any later version.
+--
+-- This program is distributed in the hope that it will be useful,
+-- but WITHOUT ANY WARRANTY; without even the implied warranty of
+-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+-- GNU General Public License for more details.
+--
+-- You should have received a copy of the GNU General Public License
+-- along with this program.  If not, see <http://www.gnu.org/licenses/>.
+--
+-------------------------------------------------------------------------------
+
+-- Purpose: Multi testbench for io_ddr.
+-- Description:
+-- Usage:
+--   > as 5
+--   > run -all
+
+LIBRARY IEEE, technology_lib;
+USE IEEE.std_logic_1164.ALL;
+USE technology_lib.technology_pkg.ALL;
+USE technology_lib.technology_select_pkg.ALL;
+
+
+ENTITY tb_tb_io_ddr IS
+END tb_tb_io_ddr;
+
+
+ARCHITECTURE tb OF tb_tb_io_ddr IS
+
+BEGIN
+
+  -- g_technology       : NATURAL := c_tech_select_default;
+  -- g_nof_repeat       : NATURAL := 2;
+  -- g_wr_flush_mode    : STRING := "SYN"  -- "VAL", "SOP", "SYN"
+
+  u_fill_wrfifo_on_next_valid     : ENTITY work.tb_io_ddr GENERIC MAP (c_tech_select_default, 2, "VAL");
+  u_fill_wrfifo_on_next_sop       : ENTITY work.tb_io_ddr GENERIC MAP (c_tech_select_default, 2, "SOP");
+  u_fill_wrfifo_on_next_sync      : ENTITY work.tb_io_ddr GENERIC MAP (c_tech_select_default, 2, "SYN");
+  
+END tb;