- Jun 25, 2015
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Zanting authored
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Pepping authored
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Pepping authored
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Pepping authored
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Pepping authored
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Pepping authored
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Pepping authored
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Pepping authored
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Pepping authored
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Pepping authored
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Pepping authored
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Pepping authored
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Pepping authored
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Pepping authored
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Pepping authored
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Pepping authored
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Pepping authored
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Pepping authored
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Eric Kooistra authored
Removed dvr_clk, because it is the mm_clk. Fixed use g_cross_domain_dvr_ctlr = TRUE to get between mm_clk and ctlr_clk_in.
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Eric Kooistra authored
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Eric Kooistra authored
Removed clock domain crossing logic for this control register, because that is done by io_ddr_cross_domain.vhd in io_ddr.vhd. Removed cal_fail and cal_ok, because these are already available via the io_ddr status register.
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Pepping authored
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Pepping authored
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Eric Kooistra authored
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Eric Kooistra authored
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Pepping authored
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Pepping authored
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Pepping authored
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Pepping authored
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Pepping authored
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Pepping authored
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Daniel van der Schuur authored
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Pepping authored
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Pepping authored
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Pepping authored
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Eric Kooistra authored
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Eric Kooistra authored
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Eric Kooistra authored
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Daniel van der Schuur authored
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