Changed names of testbneches

libraries/base/reorder/hdllib.cfg

@@ -34,8 +34,8 @@ test_bench_files =
     tb/vhdl/tb_reorder_col.vhd
     tb/vhdl/tb_tb_reorder_col.vhd    
     tb/vhdl/tb_reorder_col_wide.vhd   
-    tb/vhdl/tb_mmf_ss_parallel.vhd     
-    tb/vhdl/tb_mmf_ss_reorder.vhd     
+    tb/vhdl/tb_mmf_reorder_matrix.vhd     
+    tb/vhdl/tb_mmf_reorder_row.vhd     
 
 modelsim_search_libraries =                                                                                            
     altera_ver lpm_ver sgate_ver altera_mf_ver altera_lnsim_ver stratixiv_ver stratixiv_hssi_ver stratixiv_pcie_hip_ver