UPdated entity names

libraries/base/reorder/src/vhdl/reorder_col.vhd

@@ -26,7 +26,7 @@ USE common_lib.common_pkg.ALL;
 USE common_lib.common_mem_pkg.ALL;
 USE dp_lib.dp_stream_pkg.ALL;
 
--- Purpose: Subband select
+-- Purpose: Reorder packet
 -- Description:
 --   Select g_nof_ch_sel complex samples from an input block of g_nof_ch_in
 --   complex samples. The subband select map is arbitrary (any order and also
@@ -49,15 +49,15 @@ USE dp_lib.dp_stream_pkg.ALL;
 -- . In LOFAR the selected channels were also output time multiplexed. This 
 --   was possible because g_nof_ch_sel <= g_nof_ch_in/2. Here the output is not
 --   time multiplexed. If time multiplexing is needed then a separate component
---   needs to be used for this. For this purpose the ss_retrieve streaming
+--   needs to be used for this. For this purpose the reorder_retrieve streaming
 --   source supports the ready signal. Typically output_siso.ready='1', but
 --   when g_nof_ch_sel < g_nof_ch_in/2, then a toggling output_siso.ready can
---   be used to multiplex this SS output with another SS output stream.
--- . The SS streaming sink does not support the input_siso signal, because it
---   is assumed that the SS source is always fast enough. The SS sink could
+--   be used to multiplex this reorder_col output with another reorder_col output stream.
+-- . The reorder_col streaming sink does not support the input_siso signal, because it
+--   is assumed that the reorder_col source is always fast enough. The reorder_col sink could
 --   support the input_siso signal, e.g. based on store_done and retrieve_done.
 
-ENTITY ss IS
+ENTITY reorder_col IS
   GENERIC (
     g_use_output_rl_adapter : BOOLEAN := FALSE;  -- when true adapt output RL to 1 else the output RL is equal to c_retrieve_lat=2 which is fine if no flow control is needed.
     g_dsp_data_w            : NATURAL := 18;
@@ -83,10 +83,10 @@ ENTITY ss IS
     output_sosi    : OUT t_dp_sosi;   -- selected complex output with flow control
     output_siso    : IN  t_dp_siso := c_dp_siso_rdy
   );
-END ss;
+END reorder_col;
 
 
-ARCHITECTURE str OF ss IS 
+ARCHITECTURE str OF reorder_col IS 
 
   CONSTANT c_store_buf      : t_c_mem := (latency  => 1,
                                           adr_w    => ceil_log2(g_nof_ch_in),
@@ -143,7 +143,7 @@ BEGIN
     snk_in      => input_sosi
   );
  
-  u_store : ENTITY work.ss_store
+  u_store : ENTITY work.reorder_store
   GENERIC MAP (
     g_dsp_data_w  => g_dsp_data_w,
     g_nof_ch_in   => g_nof_ch_in,
@@ -213,7 +213,7 @@ BEGIN
     rd_val_b  => select_miso.rdval
   );
   
-  u_retrieve : ENTITY work.ss_retrieve
+  u_retrieve : ENTITY work.reorder_retrieve
   GENERIC MAP (
     g_dsp_data_w   => g_dsp_data_w,
     g_nof_ch_in    => g_nof_ch_in,

libraries/base/reorder/src/vhdl/reorder_col_wide.vhd

@@ -29,7 +29,7 @@ USE dp_lib.dp_stream_pkg.ALL;
 -- Purpose: Select and/or reorder data on multiple streams. 
 --
 -- Description:
---   Subband select unit that handles a stream that consists of
+--   Reorder-row unit that handles a stream that consists of
 --   multiple (g_wb_factor) input streams.
 --   It assumes that the g_nof_ch_in input channels are equally 
 --   distributed over the g_wb_factor input streams.  
@@ -38,7 +38,7 @@ USE dp_lib.dp_stream_pkg.ALL;
 -- Remarks:
 --
 
-ENTITY ss_wide IS
+ENTITY reorder_col_wide IS
   GENERIC (                         
     g_wb_factor          : NATURAL := 4;
     g_dsp_data_w         : NATURAL := 18;
@@ -64,9 +64,9 @@ ENTITY ss_wide IS
     output_sosi_arr     : OUT t_dp_sosi_arr(g_wb_factor-1 DOWNTO 0);   -- selected complex output with flow control
     output_siso_arr     : IN  t_dp_siso_arr(g_wb_factor-1 DOWNTO 0) := (OTHERS => c_dp_siso_rdy)
   );
-END ss_wide;
+END reorder_col_wide;
 
-ARCHITECTURE str OF ss_wide IS
+ARCHITECTURE str OF reorder_col_wide IS
 
   CONSTANT c_mem_addr_w           : NATURAL := ceil_log2(g_nof_ch_sel);  
   CONSTANT c_nof_ch_in            : NATURAL := g_nof_ch_in;
@@ -98,7 +98,7 @@ BEGIN
   -- INSTANTIATE MULTIPLE SINGLE CHANNEL SUBBAND SELECT UNITS
   ---------------------------------------------------------------
   gen_ss_singles : FOR I IN 0 TO g_wb_factor-1 GENERATE
-    u_single_ss : ENTITY work.ss
+    u_single_ss : ENTITY work.reorder_col
     GENERIC MAP (
       g_dsp_data_w         => g_dsp_data_w,
       g_nof_ch_in          => c_nof_ch_in,

libraries/base/reorder/src/vhdl/reorder_matrix.vhd

@@ -53,7 +53,7 @@ USE dp_lib.dp_stream_pkg.ALL;
 -- Remarks:
 --
 
-ENTITY ss_parallel IS
+ENTITY reorder_matrix IS
   GENERIC (                         
     g_nof_inputs            : NATURAL := 24;
     g_nof_internals         : NATURAL := 64;
@@ -85,9 +85,9 @@ ENTITY ss_parallel IS
     output_sosi_arr         : OUT t_dp_sosi_arr(g_nof_outputs-1 DOWNTO 0);   
     output_siso_arr         : IN  t_dp_siso_arr(g_nof_outputs-1 DOWNTO 0) := (OTHERS => c_dp_siso_rdy)
   );
-END ss_parallel;
+END reorder_matrix;
 
-ARCHITECTURE str OF ss_parallel IS
+ARCHITECTURE str OF reorder_matrix IS
 
   SIGNAL  ss_wide_in_sosi_arr  : t_dp_sosi_arr(g_nof_internals-1 DOWNTO 0) := (OTHERS => c_dp_sosi_rst);   
   SIGNAL  ss_wide_out_sosi_arr : t_dp_sosi_arr(g_nof_internals-1 DOWNTO 0) := (OTHERS => c_dp_sosi_rst);   
@@ -114,7 +114,7 @@ BEGIN
   -----------------------------------------------------------------------------
   -- Reorder input streams
   -----------------------------------------------------------------------------
-  u_input_reorder : ENTITY work.ss_reorder
+  u_input_reorder : ENTITY work.reorder_row
   GENERIC MAP(                         
     g_nof_inputs        => g_nof_inputs, 
     g_nof_outputs       => g_nof_internals, 
@@ -143,7 +143,7 @@ BEGIN
   -----------------------------------------------------------------------------
   -- Serial word selection per stream
   -----------------------------------------------------------------------------
-  u_ss_wide : ENTITY work.ss_wide
+  u_ss_wide : ENTITY work.reorder_col_wide
   GENERIC MAP (                         
     g_wb_factor          => g_nof_internals,  
     g_dsp_data_w         => g_dsp_data_w, 
@@ -170,7 +170,7 @@ BEGIN
   -----------------------------------------------------------------------------
   -- Reorder output streams
   -----------------------------------------------------------------------------  
-  u_output_reorder : ENTITY work.ss_reorder
+  u_output_reorder : ENTITY work.reorder_row
   GENERIC MAP(                         
     g_nof_inputs        => g_nof_internals, 
     g_nof_outputs       => g_nof_outputs, 

libraries/base/reorder/src/vhdl/reorder_retreive.vhd

@@ -35,16 +35,16 @@ USE dp_lib.dp_stream_pkg.ALL;
 --   may be selected multiple times.
 -- Remarks:
 -- . Typcially output_siso.ready='1'. When g_nof_ch_sel < g_nof_ch_in/2, then a
---   toggling output_siso.ready can be used to multiplex this SS retrieve output
---   with another SS retrieve output stream.
+--   toggling output_siso.ready can be used to multiplex this reorder retrieve output
+--   with another reorder retrieve output stream.
 -- . The retrieve_done signal occurs when the last data of the block is read
 --   requested, so 1 cycle before the output_sosi.eop.
 -- . The timing of the ch_cnt for the retrieve_mosi.address is such that the
---   SS can store a frame and retrieve it immediately in any order, so worst
+--   reorder_col can store a frame and retrieve it immediately in any order, so worst
 --   case the last stored data can be retrieved first.
 
 
-ENTITY ss_retrieve IS
+ENTITY reorder_retrieve IS
   GENERIC (
     g_dsp_data_w   : NATURAL;
     g_nof_ch_in    : NATURAL;
@@ -70,10 +70,10 @@ ENTITY ss_retrieve IS
     output_sosi       : OUT t_dp_sosi;
     output_siso       : IN  t_dp_siso := c_dp_siso_rdy
   );
-END ss_retrieve;
+END reorder_retrieve;
 
 
-ARCHITECTURE rtl OF ss_retrieve IS
+ARCHITECTURE rtl OF reorder_retrieve IS
 
   CONSTANT c_retrieve_lat    : NATURAL := 2;  -- fixed 1 for select buf read + 1 for store buf read
   

libraries/base/reorder/src/vhdl/reorder_store.vhd

@@ -34,16 +34,16 @@ USE dp_lib.dp_stream_pkg.ALL;
 -- Remarks:
 -- . The SS stores the complex input data as concatenated data = im & re with
 --   data width 2 * g_dsp_data_w.
--- . The SS does not use input sop and eop, because it uses a ch_cnt. Hence
+-- . The reorder_col does not use input sop and eop, because it uses a ch_cnt. Hence
 --   the input_sosi only needs to carry im, re and valid, the sop and eop are
 --   ignored. The ch_cnt is needed anyway to set the store_mosi.address. The
 --   g_nof_ch_in defines the number of valid per input block, so from sop to
---   eop. The ss_store assumes that the first valid corresponds to a sop. The
+--   eop. The reorder_store assumes that the first valid corresponds to a sop. The
 --   ch_cnt restarts at the and of a block, so when ch_cnt = g_nof_ch_in-1.
 -- . The store_done signal occurs when the last data of the block is being
 --   written, so 1 cycle after the input_sosi.eop.
 
-ENTITY ss_store IS
+ENTITY reorder_store IS
   GENERIC (
     g_dsp_data_w  : NATURAL;        -- = width of sosi.im = width of sosi.re
     g_nof_ch_in   : NATURAL;        -- = nof valid per input block (sop to eop)
@@ -62,10 +62,10 @@ ENTITY ss_store IS
     -- Write databuf control
     store_mosi    : OUT t_mem_mosi
   );
-END ss_store;
+END reorder_store;
 
 
-ARCHITECTURE rtl OF ss_store IS
+ARCHITECTURE rtl OF reorder_store IS
 
   SIGNAL ch_cnt           : INTEGER RANGE 0 TO g_nof_ch_in-1;
   SIGNAL nxt_ch_cnt       : INTEGER;