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Commit 8e9aa9af authored by Pepping's avatar Pepping
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Added entry for rewire

parent 5c7a2182
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......@@ -20,6 +20,7 @@ synth_files =
src/vhdl/reorder_row.vhd
src/vhdl/reorder_sequencer.vhd
src/vhdl/reorder_transpose.vhd
src/vhdl/reorder_rewire.vhd
# Old files should be renamed as follows in near future:
# ss_reorder.vhd --> reorder_row.vhd
......
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