Removed g_link_status_check from tech_eth_10g entity. Added g_direction = TX_RX default or TX_ONLY, RX_ONLY. Implemented TX_ONLY by internal loopback of MAC Tx xgmii to MAX Rx.

Renamed key hdl_lib_uses into hdl_lib_uses_synth and added new key hdl_lib_uses_sim for extra test_bench_files library dependencies.

to quartus compile

Added g_sim, g_sim_level for tech_xaui. Also require txc_rx_channelaligned_arr()='1' for tx_snk_out_arr().xon.

Default g_nof_10ppm=0 to simulate OK. When > 0 then simulation fails, perhaps the IP simulation model can not cope with ppm offset?

Added  tb_tech_eth_10g_ppm.vhd for verifying ppm clock offset between devices, however the eth_10g fails in simualtion.

Use tech_pll_lib.tech_pll_xgmii_mac_clocks to create the 312.5 and 156.25 MHz clocks for Arria10 IP.