Commits · de83af40f39642a11d9e12df2d9566bd7df81b55 · RTSD / HDL · GitLab

Snippets Groups Projects

Jun 14, 2023
- RTSD-93 , master with all style fixes · de83af40
  Pieter Donker authored 2 years ago
  
  de83af40
May 11, 2023
- Define ddr_gigabytes as integer to be able to represent both > 1GB (HW) and < 1GB (sim) sizes. · aac5f892
  Eric Kooistra authored 2 years ago
  
  aac5f892
Nov 22, 2022
- added unb2c_test_ddr_16G revision · e4f47739
  Reinier van der Walle authored 2 years ago
  
  e4f47739
Nov 14, 2022
- added 72b ddr4 16G IP + example design · b696ce0e
  Reinier van der Walle authored 2 years ago
  
  b696ce0e
May 04, 2022
- Renamed c_tech_arria10 into c_tech_arria10_proto to more easily find it with e.g. grep. · f26c2268
  Eric Kooistra authored 3 years ago
  
  f26c2268
Jan 19, 2022
- Added missing c_tech_arria10_e2sg => g_ddr4; for unb2c. · cc6e4a47
  Eric Kooistra authored 3 years ago
  
  cc6e4a47
Aug 14, 2020
- Added the IP variant ip_arria10_e1sg_ddr4_16g_1600. · 113074ba
  Reinier van der Walle authored 4 years ago
  
  113074ba
Jul 20, 2020
- Added c_tech_ddr4_8g_1600m_64 · 0577b935
  Reinier van der Walle authored 4 years ago
  
  0577b935
Dec 03, 2019
- New IP for jesd204b interface; Unb2c test revisions; Add loopback parameter to 10GbE IP · 32fc5d38
  Jonathan Hargreaves authored 5 years ago
  
  32fc5d38
Jul 02, 2018
- added variations for arria10_e1sg and arria10_e3sge3 · f0d129e7
  Reinier van der Walle authored 6 years ago
  
  f0d129e7
Dec 14, 2017
- Added func_tech_ddr_sim_size() to derive (smaller) required DDR size for... · ca735189
  Eric Kooistra authored 7 years ago
  ca735189
Mar 11, 2016
- fix duplicate drivers in wrapper · 044030e0
  Jonathan Hargreaves authored 9 years ago
  
  044030e0
Mar 10, 2016
- add ddr4_8g_1600 to packages and wrappers · eecc4c7e
  Jonathan Hargreaves authored 9 years ago
  
  eecc4c7e
Sep 30, 2015
- IP for 16GB DDR3 So-Dimm modules added · 878ceca5
  Zanting authored 9 years ago
  
  878ceca5
Aug 18, 2015
- added ddr4_4g_2000 IP · 08d9a16e
  Kenneth Hiemstra authored 9 years ago
  
  08d9a16e
Aug 13, 2015
- changed c_tech_ddr4_max to use a dual rank DDR4 as single rank (see · e39ca9bd
  Kenneth Hiemstra authored 9 years ago
  e39ca9bd
Jun 26, 2015
- Improved legenda of cs_w and cs_w_w in table. · 3f0a25a0
  Eric Kooistra authored 9 years ago
  
  3f0a25a0
Jun 23, 2015
- Default mts=1600 for DDR4 sim models · bf002039
  Eric Kooistra authored 9 years ago
  
  bf002039
- Use dedicated MB ref_clk input instead of via t_tech_ddr4_phy_in. · 109f99ce
  Eric Kooistra authored 9 years ago
  
  109f99ce
Jun 15, 2015
- added the required ref_clk to the IN record for ddr4 · ea595fc2
  Kenneth Hiemstra authored 10 years ago
  
  ea595fc2
Jun 12, 2015
- Added c_tech_ddr3_sim_* and c_tech_ddr4_sim_* constants. Added func_tech_sel_ddr() for boolean. · a0a9e860
  Eric Kooistra authored 10 years ago
  
  a0a9e860
Jun 09, 2015
- original func_tech_ddr_ctlr_data_w() function but needs fix for DDR4 · 61aa2a1f
  Kenneth Hiemstra authored 10 years ago
  
  61aa2a1f
Jun 05, 2015
- [temporary fix] for Quartus compilation. Agree on width in · 27875325
  Kenneth Hiemstra authored 10 years ago
  27875325
Apr 24, 2015
- Updated c_tech_ddr3_max · a4f69684
  Zanting authored 10 years ago
  
  a4f69684
Apr 22, 2015
- Added DDR3 single rank master and slave · 0b1592e6
  Zanting authored 10 years ago
  
  0b1592e6
Apr 08, 2015
- Added array types · 1fcaa2e3
  Pepping authored 10 years ago
  
  1fcaa2e3
- Removed internal DDR memory model (now needs to be instantiated in tb). Use... · 8e1a6162
  Eric Kooistra authored 10 years ago
  8e1a6162
Mar 11, 2015
- splitted the terminationcontrol lines from the record types... · ed82dce7
  Kenneth Hiemstra authored 10 years ago
  ed82dce7
Jan 22, 2015
- Define command_queue_depth=16 in c_tech_ddr_max. · fa92406f
  Eric Kooistra authored 10 years ago
  
  fa92406f
Jan 20, 2015
- Added ip_arria10 DDR4 IP for 4Gbyte, 1600 MTps. · 0c910766
  Eric Kooistra authored 10 years ago
  
  0c910766
Jan 08, 2015
- Added c_tech_ddr_phy_*_x constants. · 945c7d3b
  Eric Kooistra authored 10 years ago
  
  945c7d3b
- Define t_mem_ctlr_mosi/miso in common_mem_pkg, to use that instead of the... · b559785d
  Eric Kooistra authored 10 years ago
  b559785d
Jan 06, 2015
- No need for c_dq_address_w argument in func_tech_ddr_dq_address(). · 19926973
  Eric Kooistra authored 10 years ago
  
  19926973
Dec 22, 2014
- Added functions for resizing to the mosi/miso record slv fields. · 4cc7a033
  Eric Kooistra authored 10 years ago
  
  4cc7a033
- Added func_tech_ddr_dq_address() and func_tech_ddr_ctrl_address(). · b28b7e1c
  Eric Kooistra authored 10 years ago
  
  b28b7e1c
- Defined c_tech_ddr_miso_rst and c_tech_ddr_mosi_rst. · 08752f82
  Eric Kooistra authored 10 years ago
  
  08752f82
Dec 19, 2014
- Defined c_tech_ddr_max_ctrl_data_w and c_tech_ddr_max_ctrl_address_w. Added... · 9f451e28
  Eric Kooistra authored 10 years ago
  9f451e28
Dec 18, 2014
- Added functions func_tech_ddr_dq_address_w() and... · 68ed860e
  Eric Kooistra authored 10 years ago
  68ed860e
- Added func_tech_ddr_module_size() to determine the module memory size in GBytes. · fe69b4f0
  Eric Kooistra authored 10 years ago
  
  fe69b4f0
- Gather all DDR parameters in one t_c_tech_ddr record · 3c8fc0e5
  Eric Kooistra authored 10 years ago
  
  3c8fc0e5