Updated c_tech_ddr3_max

a4f69684 · Zanting · 41550906 · a4f69684
Commit a4f69684 authored 10 years ago by Zanting
--- a/libraries/technology/ddr/tech_ddr_pkg.vhd
+++ b/libraries/technology/ddr/tech_ddr_pkg.vhd
@@ -66,13 +66,13 @@ PACKAGE tech_ddr_pkg IS
  FUNCTION func_tech_ddr_ctlr_data_w(   c_ddr : t_c_tech_ddr) RETURN NATURAL;  -- return DDR    data width for the controller data at the by rsl=4 reduced rate
  FUNCTION func_tech_ddr_module_size(   c_ddr : t_c_tech_ddr) RETURN NATURAL;  -- return DDR module size in GByte
  
-  --                                                                                                   a   a
+  --                                                                                                    a   a
  --                                                                 name    mts   master rank      a   row col ba dq  dqs dm dbi bg ck cke cs cs_w odt term rsl rsl_w cqd burst burst_w
-  CONSTANT c_tech_ddr3_max                        : t_c_tech_ddr := ("none",  800,  TRUE, "DUAL  ", 15, 15, 10, 3, 64, 8,  8, 0,  0, 2, 2,  2, 1,   2,  14,  4,  2,    4,  64,   7);  -- maximum ranges for record field definitions
+  CONSTANT c_tech_ddr3_max                        : t_c_tech_ddr := ("none",  800,  TRUE, "DUAL  ", 16, 16, 10, 3, 64, 8,  8, 0,  0, 2, 2,  2, 1,   2,  14,  4,  2,    4,  64,   7);  -- maximum ranges for record field definitions
  CONSTANT c_tech_ddr3_4g_800m_master             : t_c_tech_ddr := ("DDR3",  800,  TRUE, "DUAL  ", 15, 15, 10, 3, 64, 8,  8, 0,  0, 2, 2,  2, 1,   2,  14,  4,  2,    4,  64,   7);
  CONSTANT c_tech_ddr3_4g_800m_slave              : t_c_tech_ddr := ("DDR3",  800, FALSE, "DUAL  ", 15, 15, 10, 3, 64, 8,  8, 0,  0, 2, 2,  2, 1,   2,  14,  4,  2,    4,  64,   7);
-  CONSTANT c_tech_ddr3_4g_single_rank_800m_master : t_c_tech_ddr := ("DDR3",  800,  TRUE, "SINGLE", 16, 16, 10, 3, 64, 8,  8, 0,  0, 2, 2,  1, 1,   2,  14,  4,  2,    4,  64,   7);
-  CONSTANT c_tech_ddr3_4g_single_rank_800m_slave  : t_c_tech_ddr := ("DDR3",  800, FALSE, "SINGLE", 16, 16, 10, 3, 64, 8,  8, 0,  0, 2, 2,  1, 1,   2,  14,  4,  2,    4,  64,   7);
+  CONSTANT c_tech_ddr3_4g_single_rank_800m_master : t_c_tech_ddr := ("DDR3",  800,  TRUE, "SINGLE", 16, 16, 10, 3, 64, 8,  8, 0,  0, 2, 1,  1, 0,   1,  14,  4,  2,    4,  64,   7);
+  CONSTANT c_tech_ddr3_4g_single_rank_800m_slave  : t_c_tech_ddr := ("DDR3",  800, FALSE, "SINGLE", 16, 16, 10, 3, 64, 8,  8, 0,  0, 2, 1,  1, 0,   1,  14,  4,  2,    4,  64,   7);
  
  CONSTANT c_tech_ddr4_max                        : t_c_tech_ddr := ("none", 1600,  TRUE, "DUAL  ", 17, 15, 10, 2, 72, 9,  0, 9,  2, 1, 1,  1, 0,   1,   0,  8,  3,    8,  64,   7);  -- maximum ranges for record field definitions
  CONSTANT c_tech_ddr4_4g_1600m                   : t_c_tech_ddr := ("DDR4", 1600,  TRUE, "DUAL  ", 17, 15, 10, 2, 72, 9,  0, 9,  2, 1, 1,  1, 0,   1,   0,  8,  3,    8,  64,   7);