Use v.busy, instead of r.busy, to allow start_pulse at mm_done, to support zero gaps between output blocks.

Resolve L2SDP-276

Closes L2SDP-276

See merge request desp/hdl!157

Updated st_histogram (instance) to support 200M+-512 samples per sync in LOFAR2.

Closes L2SDP-450

See merge request desp/hdl!154

Added first version of dp_bsn_align_v2.vhd with mmp and tb. This was...

Closes L2SDP-290

See merge request desp/hdl!156

added ring_rx

Closes L2SDP-274

See merge request desp/hdl!155

-Added non-constant data block generation (+-g_nof_data_per_sync_diff
samples per sync) to tb_mmp_st_histogram.vhd;
-Fixed DP RAM -> MM RAM copy address error in mmp_st_histogram;
-Changed RAM block to allow MM write by user in mmp_st_histogram;
-Changed generic map in node_sdp_adc_input_and_timing.
-All test benches pass OK.

before copying DP RAM to MM RAM;
-Changed the RAM block from cr_cw to crw_cw to allow overwrite on the
MM side (via Python);
-Added option to tb_mmp_st_histogram to introduce inconsistent
(long,short,long,short,...) sync intervals such as is the case in LOFAR.
-tb_mmp_st_histogram now shows errors due to the inconsistent sync
interval.

Use g_tb_nof_restart. Added verify_en_delayed_arr using out_sosi_arr_exp. Improved out_sosi_arr_exp.

Initialize unused mosi, miso fields to avoid ** Warning: (vsim-8684) No drivers exist on out port mm_mosi.

-Now this test bench DOES find errors in the first 4 bins like we see on
 LOFAR2 hardware.

Resolve L2SDP-471

Closes L2SDP-471

See merge request desp/hdl!153

-node_sdp_adc_input_and_timing.vhd still compiles OK in QuestaSim.

 g_nof_data_per_sync input samples.
-Test benches still pass OK.

Resolve L2SDP-423

Closes L2SDP-423

See merge request desp/hdl!152