-Now resetting RAM clear data counter at snk_in.sync instead of after

 g_nof_data_per_sync input samples.
-Test benches still pass OK.

libraries/dsp/st/src/vhdl/st_histogram.vhd

@@ -455,7 +455,7 @@ BEGIN
   -- Clear the RAM just before the next sync interval
   -------------------------------------------------------------------------------
   -- Count input data for automatic RAM clear before next sync interval
-  nxt_data_cnt <= (OTHERS=>'0') WHEN TO_UINT(data_cnt)=g_nof_data_per_sync-1 ELSE INCR_UVEC(data_cnt, 1) WHEN snk_in.valid='1' ELSE data_cnt;
+  nxt_data_cnt <= (OTHERS=>'0') WHEN snk_in.sync='1' ELSE INCR_UVEC(data_cnt, 1) WHEN snk_in.valid='1' ELSE data_cnt;
 
   -- Clear all g_nof_bins RAM addresses just before the next sync
   ram_clear <= '1' WHEN TO_UINT(data_cnt)=g_nof_data_per_sync-g_nof_bins-1 ELSE '0';