added ring_lane

libraries/base/ring/hdllib.cfg

@@ -10,6 +10,7 @@ synth_files =
     src/vhdl/ring_lane_info.vhd
     src/vhdl/ring_tx.vhd
     src/vhdl/ring_rx.vhd
+    src/vhdl/ring_lane.vhd
 test_bench_files =
     tb/vhdl/tb_ring_lane_info.vhd
 

libraries/base/ring/src/vhdl/ring_rx.vhd

@@ -22,7 +22,7 @@
 --
 -- Author: R. van der Walle
 
--- Purpose: Handle TX side of ring design.
+-- Purpose: Handle RX side of ring design.
 -- Description: See https://support.astron.nl/confluence/x/jyu7Ag
 -- Remark:
 -- . Note that the dp_fifo_fill_eop in dp_block_validate_err cannot handle

libraries/base/ring/src/vhdl/ring_tx.vhd

@@ -39,6 +39,7 @@ USE work.ring_pkg.ALL;
 ENTITY ring_tx IS
   GENERIC (
     g_lane_direction   : NATURAL := 1;
+    g_use_dp_layer     : BOOLEAN := TRUE;
     g_data_w           : NATURAL := 64;
     g_symbol_w         : NATURAL := 8;
     g_ring_pkt_type    : STD_LOGIC_VECTOR(c_halfword_w-1 DOWNTO 0) := c_ring_pkt_type_bf;
@@ -58,8 +59,8 @@ ENTITY ring_tx IS
     lane_tx_cable_sosi      : OUT t_dp_sosi;
     lane_tx_board_sosi      : OUT t_dp_sosi;
 
-    reg_bsn_monitor_v2_mosi : IN  t_mem_mosi;
-    reg_bsn_monitor_v2_miso : OUT t_mem_miso;
+    reg_bsn_monitor_v2_copi : IN  t_mem_copi;
+    reg_bsn_monitor_v2_cipo : OUT t_mem_cipo;
    
     tx_select               : IN  STD_LOGIC;
     remove_channel          : IN  STD_LOGIC_VECTOR(c_dp_stream_channel_w-1 DOWNTO 0);
@@ -72,10 +73,9 @@ ARCHITECTURE str OF ring_tx IS
 
   CONSTANT c_use_empty      : BOOLEAN := sel_a_b(g_symbol_w = g_data_w, FALSE, TRUE);
   CONSTANT c_empty_w        : NATURAL := ceil_log2(g_data_w / g_symbol_w);
-  CONSTANT c_use_dp_layer   : BOOLEAN := TRUE;
-  CONSTANT c_nof_hdr_fields : NATURAL := sel_a_b(c_use_dp_layer, c_ring_dp_nof_hdr_fields, c_ring_eth_nof_hdr_fields);
-  CONSTANT c_hdr_field_sel  : STD_LOGIC_VECTOR(c_nof_hdr_fields-1 DOWNTO 0)   := sel_a_b(c_use_dp_layer, c_ring_dp_hdr_field_sel, c_ring_eth_hdr_field_sel);
-  CONSTANT c_hdr_field_arr  : t_common_field_arr(c_nof_hdr_fields-1 DOWNTO 0) := sel_a_b(c_use_dp_layer, c_ring_dp_hdr_field_arr, c_ring_eth_hdr_field_arr);
+  CONSTANT c_nof_hdr_fields : NATURAL := sel_a_b(g_use_dp_layer, c_ring_dp_nof_hdr_fields, c_ring_eth_nof_hdr_fields);
+  CONSTANT c_hdr_field_sel  : STD_LOGIC_VECTOR(c_nof_hdr_fields-1 DOWNTO 0)   := sel_a_b(g_use_dp_layer, c_ring_dp_hdr_field_sel, c_ring_eth_hdr_field_sel);
+  CONSTANT c_hdr_field_arr  : t_common_field_arr(c_nof_hdr_fields-1 DOWNTO 0) := sel_a_b(g_use_dp_layer, c_ring_dp_hdr_field_arr, c_ring_eth_hdr_field_arr);
   CONSTANT c_fifo_size      : NATURAL := 5; -- Large enough to fit ETH/DP header.
 
   SIGNAL validated_sosi   : t_dp_sosi;
@@ -126,7 +126,7 @@ BEGIN
   hdr_fields_in(field_hi(c_hdr_field_arr, "eth_dst_mac"  ) DOWNTO field_lo(c_hdr_field_arr, "eth_dst_mac" )) <= c_ring_eth_dst_mac;
   hdr_fields_in(field_hi(c_hdr_field_arr, "eth_src_mac"  ) DOWNTO field_lo(c_hdr_field_arr, "eth_src_mac" )) <= c_ring_eth_src_mac;
   hdr_fields_in(field_hi(c_hdr_field_arr, "eth_type"     ) DOWNTO field_lo(c_hdr_field_arr, "eth_type"    )) <= g_ring_pkt_type;
-  gen_hdr_dp : IF c_use_dp_layer GENERATE
+  gen_hdr_dp : IF g_use_dp_layer GENERATE
     hdr_fields_in(field_hi(c_hdr_field_arr, "dp_channel" ) DOWNTO field_lo(c_hdr_field_arr, "dp_channel"  )) <= tx_sosi.channel(c_halfword_w-1 DOWNTO 0);
     hdr_fields_in(field_hi(c_hdr_field_arr, "dp_sync"    ) DOWNTO field_lo(c_hdr_field_arr, "dp_sync"     )) <= slv(tx_sosi.sync);
     hdr_fields_in(field_hi(c_hdr_field_arr, "dp_bsn"     ) DOWNTO field_lo(c_hdr_field_arr, "dp_bsn"      )) <= tx_sosi.bsn(62 DOWNTO 0);
@@ -189,7 +189,7 @@ BEGIN
   END PROCESS;
  
   -- BSN Monitors
-  gen_bsn_monitors : IF c_use_dp_layer GENERATE
+  gen_bsn_monitors : IF g_use_dp_layer GENERATE
     -- Convert nof_hops to source RN
     p_hop_to_src_rn: PROCESS(validated_sosi, this_rn, N_rn)
     BEGIN
@@ -216,8 +216,8 @@ BEGIN
     PORT MAP (
       mm_rst      => mm_rst,
       mm_clk      => mm_clk,
-      reg_mosi    => reg_bsn_monitor_v2_mosi,
-      reg_miso    => reg_bsn_monitor_v2_miso,
+      reg_mosi    => reg_bsn_monitor_v2_copi,
+      reg_miso    => reg_bsn_monitor_v2_cipo,
 
       dp_rst      => dp_rst,
       dp_clk      => dp_clk,