Clarified g_use_mm_output.

libraries/base/dp/src/vhdl/dp_bsn_align_v2.vhd

@@ -76,12 +76,12 @@ ENTITY dp_bsn_align_v2 IS
     -- Streaming input
     in_sosi_arr    : IN  t_dp_sosi_arr(g_nof_streams-1 DOWNTO 0);
 
-    -- Output via local MM interface in dp_clk domain
+    -- Output via local MM interface in dp_clk domain, when g_use_mm_output = TRUE.
     mm_sosi        : OUT t_dp_sosi;   -- streaming information that signals that an output block can be read
-    mm_copi        : IN  t_mem_copi;  -- read access to output block, all output streams share same mm_copi
+    mm_copi        : IN  t_mem_copi := c_mem_copi_rst;  -- read access to output block, all output streams share same mm_copi
     mm_cipo_arr    : OUT t_mem_cipo_arr(g_nof_streams-1 DOWNTO 0);
 
-    -- Output via streaming DP interface
+    -- Output via streaming DP interface, when g_use_mm_output = TRUE.
     out_sosi_arr   : OUT t_dp_sosi_arr(g_nof_streams-1 DOWNTO 0)
   );
 END dp_bsn_align_v2;
@@ -189,7 +189,7 @@ ARCHITECTURE rtl OF dp_bsn_align_v2 IS
 
 BEGIN
 
-  mm_sosi <= r.mm_sosi;
+  mm_sosi <= r.mm_sosi WHEN g_use_mm_output = TRUE ELSE c_dp_sosi_rst;
 
   p_reg : PROCESS(dp_clk, dp_rst)
   BEGIN
@@ -337,6 +337,9 @@ BEGIN
 
       -- . output via DP streaming interface
       out_sosi_arr <= d.out_sosi_arr;
+
+      -- . no output via MM interface
+      mm_cipo_arr <= (OTHERS => c_mem_cipo_rst);
     END IF;
 
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