Commits · 3f059628731682f15f8b6422f19c7ca57481ae99 · RTSD / HDL

Apr 08, 2015
- Replaced port types · 3f059628
  Pepping authored 10 years ago
  
  3f059628
- Replaced port ypes · 584a3f4e
  Pepping authored 10 years ago
  
  584a3f4e
- Copy · b3c2bd15
  Pepping authored 10 years ago
  
  b3c2bd15
- changed phy_ records conform RadioHDL pinning file · de5ee252
  Kenneth Hiemstra authored 10 years ago
  
  de5ee252
Apr 07, 2015
- changed the IP to ip_stratixiv_ddr3_master_800 · ff4e4867
  Kenneth Hiemstra authored 10 years ago
  
  ff4e4867
Apr 02, 2015
- Added default values fro MM · 2eabad81
  Pepping authored 10 years ago
  
  2eabad81
- Added default values to mm_Rst and mm_clk · 800591ef
  Pepping authored 10 years ago
  
  800591ef
- Another type · 192e1dad
  Pepping authored 10 years ago
  
  192e1dad
- Added mm ports · 7c71ba31
  Pepping authored 10 years ago
  
  7c71ba31
- Added mem library · 5566b292
  Pepping authored 10 years ago
  
  5566b292
- Fixed type · ec5d21bf
  Pepping authored 10 years ago
  
  ec5d21bf
- Added register map to read out DDR3 uniphy status signals · 5f54085b
  Pepping authored 10 years ago
  
  5f54085b
- copy + added ddr_ref_clk en ddr_gen_clk · 95cc27d9
  Pepping authored 10 years ago
  
  95cc27d9
- update · ed5fdb06
  Kenneth Hiemstra authored 10 years ago
  
  ed5fdb06