Added default values fro MM

libraries/io/ddr3/src/vhdl/ddr3.vhd

@@ -73,8 +73,8 @@ ENTITY ddr3 IS
     wr_rst             : IN    STD_LOGIC; 
     
     -- MM register map for DDR controller status info
-    reg_io_ddr_mosi    : IN    t_mem_mosi;
-    reg_io_ddr_miso    : OUT   t_mem_miso;
+    reg_io_ddr_mosi    : IN    t_mem_mosi := c_mem_mosi_rst;
+    reg_io_ddr_miso    : OUT   t_mem_miso := c_mem_miso_rst;
     
     flush_ena          : IN    STD_LOGIC; -- When toggled '1' the write-fifo flusher is enabled and stops flushing when configured trigger condition is met.