Commits · f1cda4e05761828e8beb6bc88c42fd65d1e02fde · RTSD / HDL · GitLab

Snippets Groups Projects

Mar 11, 2015
- splitted the terminationcontrol lines from the record types... · ed82dce7
  Kenneth Hiemstra authored 10 years ago
  ed82dce7
Jan 22, 2015
- Define command_queue_depth=16 in c_tech_ddr_max. · fa92406f
  Eric Kooistra authored 10 years ago
  
  fa92406f
Jan 20, 2015
- Added ip_arria10 DDR4 IP for 4Gbyte, 1600 MTps. · 0c910766
  Eric Kooistra authored 10 years ago
  
  0c910766
Jan 08, 2015
- Added c_tech_ddr_phy_*_x constants. · 945c7d3b
  Eric Kooistra authored 10 years ago
  
  945c7d3b
- Define t_mem_ctlr_mosi/miso in common_mem_pkg, to use that instead of the... · b559785d
  Eric Kooistra authored 10 years ago
  b559785d
Jan 06, 2015
- No need for c_dq_address_w argument in func_tech_ddr_dq_address(). · 19926973
  Eric Kooistra authored 10 years ago
  
  19926973
Dec 22, 2014
- Added functions for resizing to the mosi/miso record slv fields. · 4cc7a033
  Eric Kooistra authored 10 years ago
  
  4cc7a033
- Added func_tech_ddr_dq_address() and func_tech_ddr_ctrl_address(). · b28b7e1c
  Eric Kooistra authored 10 years ago
  
  b28b7e1c
- Defined c_tech_ddr_miso_rst and c_tech_ddr_mosi_rst. · 08752f82
  Eric Kooistra authored 10 years ago
  
  08752f82
Dec 19, 2014
- Defined c_tech_ddr_max_ctrl_data_w and c_tech_ddr_max_ctrl_address_w. Added... · 9f451e28
  Eric Kooistra authored 10 years ago
  9f451e28
Dec 18, 2014
- Added functions func_tech_ddr_dq_address_w() and... · 68ed860e
  Eric Kooistra authored 10 years ago
  68ed860e
- Added func_tech_ddr_module_size() to determine the module memory size in GBytes. · fe69b4f0
  Eric Kooistra authored 10 years ago
  
  fe69b4f0
- Gather all DDR parameters in one t_c_tech_ddr record · 3c8fc0e5
  Eric Kooistra authored 10 years ago
  
  3c8fc0e5
Dec 17, 2014
- Added terminationcontrol field to phy records. Renamed t_tech_ddr_mosi fields. · 92530bce
  Eric Kooistra authored 10 years ago
  
  92530bce
- Ported $UNB ddr3_pkg.vhd to tech_ddr_pkg.vhd that is generic for DDR3, but also preparing for DDR4. · 1ce21cb5
  Eric Kooistra authored 10 years ago
  
  1ce21cb5