Commits · e92d06775389c2a19d6b63864191bc0636a63ec8 · RTSD / HDL · GitLab

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Dec 22, 2014
- Use 'RANGE instead of g_wr_fifo_depth to know width of wr_fifo_usedw. · e92d0677
  Eric Kooistra authored 10 years ago
  
  e92d0677
- Use mosi/miso and sosi/siso records on the ports. · ab127a62
  Eric Kooistra authored 10 years ago
  
  ab127a62
- Prepare for DDR mosi/miso ports by adding ports ctlr_rddata,rdval and ctlr_address,wrdata. · c157ca31
  Eric Kooistra authored 10 years ago
  
  c157ca31
- use func_tech_ddr_dq_address() for end_address, start_address and for cur_addr. · 45dea166
  Eric Kooistra authored 10 years ago
  
  45dea166
Dec 19, 2014
- Added IEEE.NUMERIC_STD.ALL needed for unsigned(). · 42945002
  Eric Kooistra authored 10 years ago
  
  42945002
Dec 18, 2014
- Ported $UNB ddr3.vhd to $RADIOHDL io_ddr.vhd. Initial version, still needs to... · f894602f
  Eric Kooistra authored 10 years ago
  
  Ported $UNB ddr3.vhd to $RADIOHDL io_ddr.vhd. Initial version, still needs to be compiled and simulated with tb_io_ddr.vhd.
  f894602f