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RTSD
HDL
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340142155e0d0b66e6e143082bb0b8c561b0a3c6
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4
L2SDP-LIFT
L2SDP-1113
master
default
protected
HPR-158
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hdl
libraries
technology
ddr
tech_ddr_mem_model.vhd
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Jan 06, 2015
set MEM_TRCD=6 to avoid timing error message in simulation.
· 34014215
Eric Kooistra
authored
10 years ago
34014215
Dec 22, 2014
Corrected dqs_n connection.
· 64542894
Eric Kooistra
authored
10 years ago
64542894
Dec 19, 2014
Added ddr3 memory model for simulation. The model comes from an example design in ip_stratixiv
· bc5e1243
Eric Kooistra
authored
10 years ago
bc5e1243
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Eric Kooistra authored
Eric Kooistra authored
Eric Kooistra authored