add altera_libraries

libraries/technology/ip_arria10_e1sg/altera_libraries/altera_reset_controller_170/compile_ip.tcl

+#------------------------------------------------------------------------------
+#
+# Copyright (C) 2017
+# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
+# JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>
+# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+#
+#------------------------------------------------------------------------------
+
+# This file is based on generated file mentor/msim_setup.tcl.
+# - the values for modelsim_search_libraries key in the hdllib.cfg follow from altera libraries vmap section in the msim_setup.tcl
+# - vmap for the IP specific libraries and compile all IP source files into those libraries similar as in the msim_setup.tcl
+# - replace QSYS_SIMDIR by IP_DIR
+# - if the testbench is also generated with QSYS then only the IP_TBDIR files are needed, because these also contain the source files.
+
+#vlib ./work/         ;# Assume library work already exist      
+#
+
+set IP_DIR   "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
+ 
+vmap  altera_reset_controller_170         ./work/
+
+  vlog      "$IP_DIR/../altera_reset_controller_170/sim/mentor/altera_reset_controller.v"                                               -work altera_reset_controller_170        
+  vlog      "$IP_DIR/../altera_reset_controller_170/sim/mentor/altera_reset_synchronizer.v"                                             -work altera_reset_controller_170 

libraries/technology/ip_arria10_e1sg/altera_libraries/altera_reset_controller_170/hdllib.cfg

+hdl_lib_name = ip_arria10_e1sg_altera_reset_controller_170
+hdl_library_clause_name = altera_reset_controller_170
+hdl_lib_uses_synth = 
+hdl_lib_uses_sim = 
+hdl_lib_technology = ip_arria10_e1sg
+
+synth_files =
+    
+test_bench_files = 
+
+[modelsim_project_file]
+modelsim_compile_ip_files =
+    $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_reset_controller_170/compile_ip.tcl
+
+
+

libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_atx_pll_a10_170/compile_ip.tcl

+#------------------------------------------------------------------------------
+#
+# Copyright (C) 2017
+# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
+# JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>
+# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+#
+#------------------------------------------------------------------------------
+
+# This file is based on generated file mentor/msim_setup.tcl.
+# - the values for modelsim_search_libraries key in the hdllib.cfg follow from altera libraries vmap section in the msim_setup.tcl
+# - vmap for the IP specific libraries and compile all IP source files into those libraries similar as in the msim_setup.tcl
+# - replace QSYS_SIMDIR by IP_DIR
+# - if the testbench is also generated with QSYS then only the IP_TBDIR files are needed, because these also contain the source files.
+
+#vlib ./work/         ;# Assume library work already exist                                                                                        
+
+
+set IP_DIR   "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
+
+vmap  altera_common_sv_packages           ./work/
+vmap  altera_xcvr_atx_pll_a10_170         ./work/
+
+  vlog -sv   "$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/altera_xcvr_native_a10_functions_h.sv"                                                                   -work altera_common_sv_packages          
+  vlog -sv   "$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/twentynm_xcvr_avmm.sv"                                                      -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_170        
+  vlog -sv   "$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/mentor/twentynm_xcvr_avmm.sv"                                               -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_170        
+  vlog -sv   "$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/alt_xcvr_resync.sv"                                                         -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_170        
+  vlog -sv   "$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/alt_xcvr_arbiter.sv"                                                        -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_170        
+  vlog -sv   "$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/mentor/alt_xcvr_resync.sv"                                                  -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_170        
+  vlog -sv   "$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/mentor/alt_xcvr_arbiter.sv"                                                 -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_170        
+  vlog -sv   "$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/a10_avmm_h.sv"                                                              -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_170        
+  vlog -sv   "$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/alt_xcvr_atx_pll_rcfg_arb.sv"                                               -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_170        
+  vlog -sv   "$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/a10_xcvr_atx_pll.sv"                                                        -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_170        
+  vlog -sv   "$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/alt_xcvr_pll_embedded_debug.sv"                                             -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_170        
+  vlog -sv   "$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/alt_xcvr_pll_avmm_csr.sv"                                                   -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_170        
+  vlog -sv   "$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/mentor/alt_xcvr_atx_pll_rcfg_arb.sv"                                        -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_170        
+  vlog -sv   "$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/mentor/a10_xcvr_atx_pll.sv"                                                 -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_170        
+  vlog -sv   "$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/mentor/alt_xcvr_pll_embedded_debug.sv"                                      -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_170        
+  vlog -sv   "$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/mentor/alt_xcvr_pll_avmm_csr.sv"                                            -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_170        
+  vlog -sv   "$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/ip_arria10_e1sg_transceiver_pll_10g_altera_xcvr_atx_pll_a10_170_3gt7q7a.sv" -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_170        
+  vlog -sv   "$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/alt_xcvr_atx_pll_rcfg_opt_logic_3gt7q7a.sv"                                 -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_170        
+                                                                                               

libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_atx_pll_a10_170/hdllib.cfg

+hdl_lib_name = ip_arria10_e1sg_altera_xcvr_atx_pll_a10_170
+hdl_library_clause_name = altera_xcvr_atx_pll_a10_170
+hdl_lib_uses_synth = 
+hdl_lib_uses_sim = 
+hdl_lib_technology = ip_arria10_e1sg
+
+synth_files =
+    
+test_bench_files = 
+
+
+[modelsim_project_file]
+modelsim_compile_ip_files =
+    $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_atx_pll_a10_170/compile_ip.tcl
+
+
+

libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_fpll_a10_170/compile_ip.tcl

+#------------------------------------------------------------------------------
+#
+# Copyright (C) 2017
+# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
+# JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>
+# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+#
+#------------------------------------------------------------------------------
+
+# This file is based on generated file mentor/msim_setup.tcl.
+# - the values for modelsim_search_libraries key in the hdllib.cfg follow from altera libraries vmap section in the msim_setup.tcl
+# - vmap for the IP specific libraries and compile all IP source files into those libraries similar as in the msim_setup.tcl
+# - replace QSYS_SIMDIR by IP_DIR
+# - if the testbench is also generated with QSYS then only the IP_TBDIR files are needed, because these also contain the source files.
+
+#vlib ./work/         ;# Assume library work already exist                                                                                        
+
+
+set IP_DIR   "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
+
+vmap  altera_xcvr_fpll_a10_170             ./work/
+
+#pll_xgmii_mac_clocks
+  vlog -sv  "$IP_DIR/../altera_xcvr_fpll_a10_170/sim/twentynm_xcvr_avmm.sv"                 -work altera_xcvr_fpll_a10_170            
+  vlog -sv  "$IP_DIR/../altera_xcvr_fpll_a10_170/sim/mentor/twentynm_xcvr_avmm.sv"          -work altera_xcvr_fpll_a10_170            
+  vlog -sv  "$IP_DIR/../altera_xcvr_fpll_a10_170/sim/alt_xcvr_resync.sv"                    -work altera_xcvr_fpll_a10_170            
+  vlog -sv  "$IP_DIR/../altera_xcvr_fpll_a10_170/sim/mentor/alt_xcvr_resync.sv"             -work altera_xcvr_fpll_a10_170            
+  vlog -sv  "$IP_DIR/../altera_xcvr_fpll_a10_170/sim/altera_xcvr_fpll_a10.sv"               -work altera_xcvr_fpll_a10_170            
+  vlog -sv  "$IP_DIR/../altera_xcvr_fpll_a10_170/sim/mentor/altera_xcvr_fpll_a10.sv"        -work altera_xcvr_fpll_a10_170            
+  vlog -sv  "$IP_DIR/../altera_xcvr_fpll_a10_170/sim/a10_avmm_h.sv"                         -work altera_xcvr_fpll_a10_170            
+  vlog -sv  "$IP_DIR/../altera_xcvr_fpll_a10_170/sim/alt_xcvr_native_avmm_nf.sv"            -work altera_xcvr_fpll_a10_170            
+  vlog -sv  "$IP_DIR/../altera_xcvr_fpll_a10_170/sim/alt_xcvr_pll_embedded_debug.sv"        -work altera_xcvr_fpll_a10_170            
+  vlog -sv  "$IP_DIR/../altera_xcvr_fpll_a10_170/sim/alt_xcvr_pll_avmm_csr.sv"              -work altera_xcvr_fpll_a10_170            
+  vlog -sv  "$IP_DIR/../altera_xcvr_fpll_a10_170/sim/mentor/alt_xcvr_pll_embedded_debug.sv" -work altera_xcvr_fpll_a10_170            
+  vlog -sv  "$IP_DIR/../altera_xcvr_fpll_a10_170/sim/mentor/alt_xcvr_pll_avmm_csr.sv"       -work altera_xcvr_fpll_a10_170                            
+
+

libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_fpll_a10_170/hdllib.cfg

+hdl_lib_name = ip_arria10_e1sg_altera_xcvr_fpll_a10_170
+hdl_library_clause_name = altera_xcvr_fpll_a10_170
+hdl_lib_uses_synth = 
+hdl_lib_uses_sim = 
+hdl_lib_technology = ip_arria10_e1sg
+
+synth_files =
+    
+test_bench_files = 
+
+
+[modelsim_project_file]
+modelsim_compile_ip_files =
+    $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_fpll_a10_170/compile_ip.tcl
+
+
+

libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_native_a10_170/compile_ip.tcl

+#------------------------------------------------------------------------------
+#
+# Copyright (C) 2017
+# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
+# JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>
+# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+#
+#------------------------------------------------------------------------------
+
+# This file is based on generated file mentor/msim_setup.tcl.
+# - the values for modelsim_search_libraries key in the hdllib.cfg follow from altera libraries vmap section in the msim_setup.tcl
+# - vmap for the IP specific libraries and compile all IP source files into those libraries similar as in the msim_setup.tcl
+# - replace QSYS_SIMDIR by IP_DIR
+# - if the testbench is also generated with QSYS then only the IP_TBDIR files are needed, because these also contain the source files.
+
+#vlib ./work/         ;# Assume library work already exist   
+
+vmap  altera_xcvr_native_a10_170       ./work/
+vmap  altera_common_sv_packages        ./work/
+
+
+set IP_DIR   "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
+
+# common dependencies
+  vlog -sv  "$IP_DIR/../altera_xcvr_native_a10_170/sim/altera_xcvr_native_a10_functions_h.sv"                                                               -work altera_common_sv_packages       
+  vlog -sv  "$IP_DIR/../altera_xcvr_native_a10_170/sim/alt_xcvr_resync.sv"                                                     -L altera_common_sv_packages -work altera_xcvr_native_a10_170      
+  vlog -sv  "$IP_DIR/../altera_xcvr_native_a10_170/sim/alt_xcvr_arbiter.sv"                                                    -L altera_common_sv_packages -work altera_xcvr_native_a10_170      
+  vlog -sv  "$IP_DIR/../altera_xcvr_native_a10_170/sim/mentor/alt_xcvr_resync.sv"                                              -L altera_common_sv_packages -work altera_xcvr_native_a10_170      
+  vlog -sv  "$IP_DIR/../altera_xcvr_native_a10_170/sim/mentor/alt_xcvr_arbiter.sv"                                             -L altera_common_sv_packages -work altera_xcvr_native_a10_170      
+  vlog -sv  "$IP_DIR/../altera_xcvr_native_a10_170/sim/twentynm_pcs.sv"                                                        -L altera_common_sv_packages -work altera_xcvr_native_a10_170      
+  vlog -sv  "$IP_DIR/../altera_xcvr_native_a10_170/sim/twentynm_pma.sv"                                                        -L altera_common_sv_packages -work altera_xcvr_native_a10_170      
+  vlog -sv  "$IP_DIR/../altera_xcvr_native_a10_170/sim/twentynm_xcvr_avmm.sv"                                                  -L altera_common_sv_packages -work altera_xcvr_native_a10_170      
+  vlog -sv  "$IP_DIR/../altera_xcvr_native_a10_170/sim/twentynm_xcvr_native.sv"                                                -L altera_common_sv_packages -work altera_xcvr_native_a10_170      
+  vlog -sv  "$IP_DIR/../altera_xcvr_native_a10_170/sim/mentor/twentynm_pcs.sv"                                                 -L altera_common_sv_packages -work altera_xcvr_native_a10_170      
+  vlog -sv  "$IP_DIR/../altera_xcvr_native_a10_170/sim/mentor/twentynm_pma.sv"                                                 -L altera_common_sv_packages -work altera_xcvr_native_a10_170      
+  vlog -sv  "$IP_DIR/../altera_xcvr_native_a10_170/sim/mentor/twentynm_xcvr_avmm.sv"                                           -L altera_common_sv_packages -work altera_xcvr_native_a10_170      
+  vlog -sv  "$IP_DIR/../altera_xcvr_native_a10_170/sim/mentor/twentynm_xcvr_native.sv"                                         -L altera_common_sv_packages -work altera_xcvr_native_a10_170      
+  vlog -sv  "$IP_DIR/../altera_xcvr_native_a10_170/sim/a10_avmm_h.sv"                                                          -L altera_common_sv_packages -work altera_xcvr_native_a10_170      
+  vlog -sv  "$IP_DIR/../altera_xcvr_native_a10_170/sim/alt_xcvr_native_pipe_retry.sv"                                          -L altera_common_sv_packages -work altera_xcvr_native_a10_170      
+  vlog -sv  "$IP_DIR/../altera_xcvr_native_a10_170/sim/alt_xcvr_native_avmm_csr.sv"                                            -L altera_common_sv_packages -work altera_xcvr_native_a10_170      
+  vlog -sv  "$IP_DIR/../altera_xcvr_native_a10_170/sim/alt_xcvr_native_prbs_accum.sv"                                          -L altera_common_sv_packages -work altera_xcvr_native_a10_170      
+  vlog -sv  "$IP_DIR/../altera_xcvr_native_a10_170/sim/alt_xcvr_native_odi_accel.sv"                                           -L altera_common_sv_packages -work altera_xcvr_native_a10_170      
+  vlog -sv  "$IP_DIR/../altera_xcvr_native_a10_170/sim/alt_xcvr_native_rcfg_arb.sv"                                            -L altera_common_sv_packages -work altera_xcvr_native_a10_170      
+  vlog -sv  "$IP_DIR/../altera_xcvr_native_a10_170/sim/altera_xcvr_native_pcie_dfe_params_h.sv"                                -L altera_common_sv_packages -work altera_xcvr_native_a10_170      
+  vlog -sv  "$IP_DIR/../altera_xcvr_native_a10_170/sim/pcie_mgmt_commands_h.sv"                                                -L altera_common_sv_packages -work altera_xcvr_native_a10_170      
+  vlog -sv  "$IP_DIR/../altera_xcvr_native_a10_170/sim/pcie_mgmt_functions_h.sv"                                               -L altera_common_sv_packages -work altera_xcvr_native_a10_170      
+  vlog -sv  "$IP_DIR/../altera_xcvr_native_a10_170/sim/pcie_mgmt_program.sv"                                                   -L altera_common_sv_packages -work altera_xcvr_native_a10_170      
+  vlog -sv  "$IP_DIR/../altera_xcvr_native_a10_170/sim/pcie_mgmt_cpu.sv"                                                       -L altera_common_sv_packages -work altera_xcvr_native_a10_170      
+  vlog -sv  "$IP_DIR/../altera_xcvr_native_a10_170/sim/pcie_mgmt_master.sv"                                                    -L altera_common_sv_packages -work altera_xcvr_native_a10_170      
+  vlog -sv  "$IP_DIR/../altera_xcvr_native_a10_170/sim/altera_xcvr_native_pcie_dfe_ip.sv"                                      -L altera_common_sv_packages -work altera_xcvr_native_a10_170      
+  vlog -sv  "$IP_DIR/../altera_xcvr_native_a10_170/sim/reconfig/altera_xcvr_native_a10_reconfig_parameters.sv"                 -L altera_common_sv_packages -work altera_xcvr_native_a10_170  
+
+# phy_10gbase_r_48
+  vlog -sv  "$IP_DIR/../altera_xcvr_native_a10_170/sim/ip_arria10_e1sg_phy_10gbase_r_48_altera_xcvr_native_a10_170_otmjdta.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_170      
+  vlog -sv  "$IP_DIR/../altera_xcvr_native_a10_170/sim/alt_xcvr_native_rcfg_opt_logic_otmjdta.sv"                              -L altera_common_sv_packages -work altera_xcvr_native_a10_170  
+
+# phy_10gbase_r_24
+#set IP_DIR   "$env(RADIOHDL)/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_24/generated/sim"
+  vlog -sv  "$IP_DIR/../altera_xcvr_native_a10_170/sim/ip_arria10_e1sg_phy_10gbase_r_24_altera_xcvr_native_a10_170_edf7tdy.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_170      
+  vlog -sv  "$IP_DIR/../altera_xcvr_native_a10_170/sim/alt_xcvr_native_rcfg_opt_logic_edf7tdy.sv"                              -L altera_common_sv_packages -work altera_xcvr_native_a10_170  
+
+# phy_10gbase_r_12
+#set IP_DIR   "$env(RADIOHDL)/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_12/generated/sim"
+  vlog -sv  "$IP_DIR/../altera_xcvr_native_a10_170/sim/ip_arria10_e1sg_phy_10gbase_r_12_altera_xcvr_native_a10_170_uyp7wca.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_170      
+  vlog -sv  "$IP_DIR/../altera_xcvr_native_a10_170/sim/alt_xcvr_native_rcfg_opt_logic_uyp7wca.sv"                              -L altera_common_sv_packages -work altera_xcvr_native_a10_170  
+
+# phy_10gbase_r_4
+#set IP_DIR   "$env(RADIOHDL)/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_4/generated/sim"
+  vlog -sv  "$IP_DIR/../altera_xcvr_native_a10_170/sim/ip_arria10_e1sg_phy_10gbase_r_4_altera_xcvr_native_a10_170_5bntvuq.sv"  -L altera_common_sv_packages -work altera_xcvr_native_a10_170     
+  vlog -sv  "$IP_DIR/../altera_xcvr_native_a10_170/sim/alt_xcvr_native_rcfg_opt_logic_5bntvuq.sv"                              -L altera_common_sv_packages -work altera_xcvr_native_a10_170  
+
+# phy_10gbase_r_3
+#set IP_DIR   "$env(RADIOHDL)/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_3/generated/sim"
+  vlog -sv  "$IP_DIR/../altera_xcvr_native_a10_170/sim/ip_arria10_e1sg_phy_10gbase_r_3_altera_xcvr_native_a10_170_exiqljq.sv"  -L altera_common_sv_packages -work altera_xcvr_native_a10_170     
+  vlog -sv  "$IP_DIR/../altera_xcvr_native_a10_170/sim/alt_xcvr_native_rcfg_opt_logic_exiqljq.sv"                              -L altera_common_sv_packages -work altera_xcvr_native_a10_170  
+
+# phy_10gbase_r
+#set IP_DIR   "$env(RADIOHDL)/libraries/technology/ip_arria10_e1sg/phy_10gbase_r/generated/sim"
+  vlog -sv  "$IP_DIR/../altera_xcvr_native_a10_170/sim/ip_arria10_e1sg_phy_10gbase_r_altera_xcvr_native_a10_170_s7t4kxy.sv"    -L altera_common_sv_packages -work altera_xcvr_native_a10_170   
+  vlog -sv  "$IP_DIR/../altera_xcvr_native_a10_170/sim/alt_xcvr_native_rcfg_opt_logic_s7t4kxy.sv"                              -L altera_common_sv_packages -work altera_xcvr_native_a10_170 
+
+# tse_sgmii_gx
+#set IP_DIR   "$env(RADIOHDL)/libraries/technology/ip_arria10_e1sg/tse_sgmii_gx/generated/sim"
+  vlog -sv  "$IP_DIR/../altera_xcvr_native_a10_170/sim/ip_arria10_e1sg_tse_sgmii_gx_altera_xcvr_native_a10_170_q6y47ey.sv"     -L altera_common_sv_packages -work altera_xcvr_native_a10_170            
+  vlog -sv  "$IP_DIR/../altera_xcvr_native_a10_170/sim/alt_xcvr_native_rcfg_opt_logic_q6y47ey.sv"                              -L altera_common_sv_packages -work altera_xcvr_native_a10_170  

libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_native_a10_170/hdllib.cfg

+hdl_lib_name = ip_arria10_e1sg_altera_xcvr_native_a10_170
+hdl_library_clause_name = altera_xcvr_native_a10_170
+hdl_lib_uses_synth = 
+hdl_lib_uses_sim = 
+hdl_lib_technology = ip_arria10_e1sg
+
+synth_files =
+    
+test_bench_files = 
+
+
+[modelsim_project_file]
+modelsim_compile_ip_files =
+    $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_native_a10_170/compile_ip.tcl
+
+

libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_reset_control_170/compile_ip.tcl

+#------------------------------------------------------------------------------
+#
+# Copyright (C) 2017
+# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
+# JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>
+# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+#
+#------------------------------------------------------------------------------
+
+# This file is based on generated file mentor/msim_setup.tcl.
+# - the values for modelsim_search_libraries key in the hdllib.cfg follow from altera libraries vmap section in the msim_setup.tcl
+# - vmap for the IP specific libraries and compile all IP source files into those libraries similar as in the msim_setup.tcl
+# - replace QSYS_SIMDIR by IP_DIR
+# - if the testbench is also generated with QSYS then only the IP_TBDIR files are needed, because these also contain the source files.
+
+#vlib ./work/         ;# Assume library work already exist                                                                                        
+
+
+set IP_DIR   "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
+
+vmap  altera_xcvr_reset_control_170                  ./work/
+
+  vlog -sv  "$IP_DIR/../altera_xcvr_reset_control_170/sim/altera_xcvr_functions.sv"            -work altera_xcvr_reset_control_170                 
+  vlog -sv  "$IP_DIR/../altera_xcvr_reset_control_170/sim/mentor/altera_xcvr_functions.sv"     -work altera_xcvr_reset_control_170                 
+  vlog -sv  "$IP_DIR/../altera_xcvr_reset_control_170/sim/alt_xcvr_resync.sv"                  -work altera_xcvr_reset_control_170                 
+  vlog -sv  "$IP_DIR/../altera_xcvr_reset_control_170/sim/mentor/alt_xcvr_resync.sv"           -work altera_xcvr_reset_control_170                 
+  vlog -sv  "$IP_DIR/../altera_xcvr_reset_control_170/sim/altera_xcvr_reset_control.sv"        -work altera_xcvr_reset_control_170                 
+  vlog -sv  "$IP_DIR/../altera_xcvr_reset_control_170/sim/alt_xcvr_reset_counter.sv"           -work altera_xcvr_reset_control_170                 
+  vlog -sv  "$IP_DIR/../altera_xcvr_reset_control_170/sim/mentor/altera_xcvr_reset_control.sv" -work altera_xcvr_reset_control_170                 
+  vlog -sv  "$IP_DIR/../altera_xcvr_reset_control_170/sim/mentor/alt_xcvr_reset_counter.sv"    -work altera_xcvr_reset_control_170                 
+                

libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_reset_control_170/hdllib.cfg

+hdl_lib_name = ip_arria10_e1sg_altera_xcvr_reset_control_170
+hdl_library_clause_name = altera_xcvr_reset_control_170
+hdl_lib_uses_synth = 
+hdl_lib_uses_sim = 
+hdl_lib_technology = ip_arria10_e1sg
+
+synth_files =
+    
+test_bench_files = 
+
+
+[modelsim_project_file]
+modelsim_compile_ip_files =
+    $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_reset_control_170/compile_ip.tcl
+
+

libraries/technology/ip_arria10_e1sg/altera_libraries/channel_adapter_170/compile_ip.tcl

+#------------------------------------------------------------------------------
+#
+# Copyright (C) 2017
+# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
+# JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>
+# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+#
+#------------------------------------------------------------------------------
+
+# This file is based on generated file mentor/msim_setup.tcl.
+# - the values for modelsim_search_libraries key in the hdllib.cfg follow from altera libraries vmap section in the msim_setup.tcl
+# - vmap for the IP specific libraries and compile all IP source files into those libraries similar as in the msim_setup.tcl
+# - replace QSYS_SIMDIR by IP_DIR
+# - if the testbench is also generated with QSYS then only the IP_TBDIR files are needed, because these also contain the source files.
+
+#vlib ./work/         ;# Assume library work already exist      
+#
+
+
+set IP_DIR   "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
+
+vmap  channel_adapter_170                   ./work/
+
+  vlog -sv  "$IP_DIR/../channel_adapter_170/sim/ip_arria10_e1sg_ddr4_8g_1600_channel_adapter_170_bsi6toa.sv"                            -work channel_adapter_170                  
+  vlog -sv  "$IP_DIR/../channel_adapter_170/sim/ip_arria10_e1sg_ddr4_8g_1600_channel_adapter_170_xbvi4ny.sv"                            -work channel_adapter_170              
+
+                                                      

libraries/technology/ip_arria10_e1sg/altera_libraries/channel_adapter_170/hdllib.cfg

+hdl_lib_name = ip_arria10_e1sg_channel_adapter_170
+hdl_library_clause_name = channel_adapter_170
+hdl_lib_uses_synth = 
+hdl_lib_uses_sim = 
+hdl_lib_technology = ip_arria10_e1sg
+
+synth_files =
+    
+test_bench_files = 
+
+[modelsim_project_file]
+modelsim_compile_ip_files =
+    $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/channel_adapter_170/compile_ip.tcl
+
+
+

libraries/technology/ip_arria10_e1sg/altera_libraries/timing_adapter_170/compile_ip.tcl

+#------------------------------------------------------------------------------
+#
+# Copyright (C) 2017
+# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
+# JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>
+# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+#
+#------------------------------------------------------------------------------
+
+# This file is based on generated file mentor/msim_setup.tcl.
+# - the values for modelsim_search_libraries key in the hdllib.cfg follow from altera libraries vmap section in the msim_setup.tcl
+# - vmap for the IP specific libraries and compile all IP source files into those libraries similar as in the msim_setup.tcl
+# - replace QSYS_SIMDIR by IP_DIR
+# - if the testbench is also generated with QSYS then only the IP_TBDIR files are needed, because these also contain the source files.
+
+#vlib ./work/         ;# Assume library work already exist      
+#
+
+
+set IP_DIR   "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
+
+vmap  timing_adapter_170                    ./work/
+                  
+  vlog -sv  "$IP_DIR/../timing_adapter_170/sim/ip_arria10_e1sg_ddr4_8g_1600_timing_adapter_170_osazali.sv"                              -work timing_adapter_170                   
+
+                                                      

libraries/technology/ip_arria10_e1sg/altera_libraries/timing_adapter_170/hdllib.cfg

+hdl_lib_name = ip_arria10_e1sg_timing_adapter_170
+hdl_library_clause_name = timing_adapter_170
+hdl_lib_uses_synth = 
+hdl_lib_uses_sim = 
+hdl_lib_technology = ip_arria10_e1sg
+
+synth_files =
+    
+test_bench_files = 
+
+[modelsim_project_file]
+modelsim_compile_ip_files =
+    $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/timing_adapter_170/compile_ip.tcl
+
+
+