Ready for review.

applications/lofar2/libraries/ddrctrl/tb/vhdl/tb_ddrctrl.vhd

@@ -50,7 +50,7 @@ END tb_ddrctrl;
 
 ARCHITECTURE tb OF tb_ddrctrl IS
 
-  CONSTANT c_sim_model       : BOOLEAN                                               := TRUE;                                    -- determens if this is a simulation
+  CONSTANT c_sim_model        : BOOLEAN                                               := TRUE;                                    -- determens if this is a simulation
 
   -- Select DDR3 or DDR4 dependent on the technology and sim model
   CONSTANT c_mem_ddr          : t_c_tech_ddr                                          := func_tech_sel_ddr(g_technology, g_tech_ddr3, g_tech_ddr4);