From 690755b799effb4f309684039124b61ec297ad1c Mon Sep 17 00:00:00 2001 From: JobvanWee <wee@astron.nl> Date: Mon, 11 Apr 2022 16:49:47 +0200 Subject: [PATCH] Ready for review. --- applications/lofar2/libraries/ddrctrl/tb/vhdl/tb_ddrctrl.vhd | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/applications/lofar2/libraries/ddrctrl/tb/vhdl/tb_ddrctrl.vhd b/applications/lofar2/libraries/ddrctrl/tb/vhdl/tb_ddrctrl.vhd index afba9df90a..212ecd8d2f 100644 --- a/applications/lofar2/libraries/ddrctrl/tb/vhdl/tb_ddrctrl.vhd +++ b/applications/lofar2/libraries/ddrctrl/tb/vhdl/tb_ddrctrl.vhd @@ -50,7 +50,7 @@ END tb_ddrctrl; ARCHITECTURE tb OF tb_ddrctrl IS - CONSTANT c_sim_model : BOOLEAN := TRUE; -- determens if this is a simulation + CONSTANT c_sim_model : BOOLEAN := TRUE; -- determens if this is a simulation -- Select DDR3 or DDR4 dependent on the technology and sim model CONSTANT c_mem_ddr : t_c_tech_ddr := func_tech_sel_ddr(g_technology, g_tech_ddr3, g_tech_ddr4); -- GitLab