add key to hdllib.cfg

libraries/technology/ip_arria10_e3sge3/temp_sense/hdllib.cfg

...chnology/ip_arria10_e3sge3/transceiver_pll_10g/hdllib.cfg

..._arria10_e3sge3/transceiver_reset_controller_1/hdllib.cfg

...arria10_e3sge3/transceiver_reset_controller_12/hdllib.cfg

...arria10_e3sge3/transceiver_reset_controller_24/hdllib.cfg

..._arria10_e3sge3/transceiver_reset_controller_4/hdllib.cfg

...arria10_e3sge3/transceiver_reset_controller_48/hdllib.cfg

...ries/technology/ip_arria10_e3sge3/tse_sgmii_gx/hdllib.cfg

...es/technology/ip_arria10_e3sge3/tse_sgmii_lvds/hdllib.cfg

...ies/technology/ip_arria10_e3sge3/voltage_sense/hdllib.cfg

libraries/technology/ip_stratixiv/ddr3_mem_model/hdllib.cfg

...ology/ip_stratixiv/ddr3_uphy_16g_dual_rank_800/hdllib.cfg

...echnology/ip_stratixiv/ddr3_uphy_4g_800_master/hdllib.cfg

...technology/ip_stratixiv/ddr3_uphy_4g_800_slave/hdllib.cfg

..._stratixiv/ddr3_uphy_4g_single_rank_800_master/hdllib.cfg

...p_stratixiv/ddr3_uphy_4g_single_rank_800_slave/hdllib.cfg

libraries/technology/ip_stratixiv/mac_10g/hdllib.cfg

...d/ip_stratixiv_phy_xaui_0_sim/ip_stratixiv_phy_xaui_0.vhd

...nerated/ip_stratixiv_phy_xaui_0_sim/mentor/msim_setup.tcl

...tratixiv_phy_xaui_soft_sim/ip_stratixiv_phy_xaui_soft.vhd