diff --git a/boards/uniboard1/designs/unb1_bn_capture/hdllib.cfg b/boards/uniboard1/designs/unb1_bn_capture/hdllib.cfg
index e970f796712cf4d51ca47324d90d92a833b1f3cd..6886ae203afb71ef91eae35fb8a3e86f6b2eff54 100644
--- a/boards/uniboard1/designs/unb1_bn_capture/hdllib.cfg
+++ b/boards/uniboard1/designs/unb1_bn_capture/hdllib.cfg
@@ -47,3 +47,6 @@ quartus_sdc_files =
+
+nios2_app_userflags = -DCOMPILE_FOR_SOPC
+
diff --git a/boards/uniboard1/designs/unb1_bn_terminal_bg/hdllib.cfg b/boards/uniboard1/designs/unb1_bn_terminal_bg/hdllib.cfg
index e927886e07bc19dbeb12725fc3d420b243537bf5..39f2b4fad8a7239570ee26376d6604c67e300549 100644
--- a/boards/uniboard1/designs/unb1_bn_terminal_bg/hdllib.cfg
+++ b/boards/uniboard1/designs/unb1_bn_terminal_bg/hdllib.cfg
@@ -34,3 +34,6 @@ quartus_qip_files = $HDL_BUILD_DIR/unb1/quartus/unb1_bn_terminal_bg/sopc_unb1_bn
quartus_sdc_files =
$RADIOHDL_WORK/boards/uniboard1/libraries/unb1_board/quartus/unb1_board.sdc
+
+nios2_app_userflags = -DCOMPILE_FOR_SOPC
+
diff --git a/boards/uniboard1/designs/unb1_ddr3/hdllib.cfg b/boards/uniboard1/designs/unb1_ddr3/hdllib.cfg
index d3453f987cb6922b2f80a72590a119b9db314085..6ac27885844b2a214ea3ad1f3624e8b4f823d74a 100644
--- a/boards/uniboard1/designs/unb1_ddr3/hdllib.cfg
+++ b/boards/uniboard1/designs/unb1_ddr3/hdllib.cfg
@@ -38,3 +38,6 @@ quartus_tcl_files =
quartus_sdc_files =
$RADIOHDL_WORK/boards/uniboard1/libraries/unb1_board/quartus/unb1_board.sdc
+
+nios2_app_userflags = -DCOMPILE_FOR_SOPC
+
diff --git a/boards/uniboard1/designs/unb1_ddr3_reorder/revisions/unb1_ddr3_reorder_dual_rank/hdllib.cfg b/boards/uniboard1/designs/unb1_ddr3_reorder/revisions/unb1_ddr3_reorder_dual_rank/hdllib.cfg
index 4bded51236d67df60ccce7cc8bc964421e7517f6..e9680ed83e905cb146ba412cc8cd9aff312ea306 100644
--- a/boards/uniboard1/designs/unb1_ddr3_reorder/revisions/unb1_ddr3_reorder_dual_rank/hdllib.cfg
+++ b/boards/uniboard1/designs/unb1_ddr3_reorder/revisions/unb1_ddr3_reorder_dual_rank/hdllib.cfg
@@ -45,3 +45,6 @@ quartus_qip_files =
$RADIOHDL_WORK/libraries/technology/ip_stratixiv/ddr3_uphy_4g_800_master/generated/ip_stratixiv_ddr3_uphy_4g_800_master.qip
$RADIOHDL_WORK/build/unb1/quartus/unb1_ddr3_reorder_dual_rank/sopc_unb1_ddr3_reorder.qip
+
+nios2_app_userflags = -DCOMPILE_FOR_SOPC
+
diff --git a/boards/uniboard1/designs/unb1_ddr3_reorder/revisions/unb1_ddr3_reorder_single_rank/hdllib.cfg b/boards/uniboard1/designs/unb1_ddr3_reorder/revisions/unb1_ddr3_reorder_single_rank/hdllib.cfg
index d9e3a8cd86f62f5cea4ca23502f9b604f27d3c60..4e1e86e84b79b96955ab0bb1ca1a60f3a2fa8669 100644
--- a/boards/uniboard1/designs/unb1_ddr3_reorder/revisions/unb1_ddr3_reorder_single_rank/hdllib.cfg
+++ b/boards/uniboard1/designs/unb1_ddr3_reorder/revisions/unb1_ddr3_reorder_single_rank/hdllib.cfg
@@ -45,3 +45,6 @@ quartus_qip_files =
$RADIOHDL_WORK/libraries/technology/ip_stratixiv/ddr3_uphy_4g_single_rank_800_master/generated/ip_stratixiv_ddr3_uphy_4g_single_rank_800_master.qip
$RADIOHDL_WORK/build/unb1/quartus/unb1_ddr3_reorder_single_rank/sopc_unb1_ddr3_reorder.qip
+
+nios2_app_userflags = -DCOMPILE_FOR_SOPC
+
diff --git a/boards/uniboard1/designs/unb1_ddr3_transpose/hdllib.cfg b/boards/uniboard1/designs/unb1_ddr3_transpose/hdllib.cfg
index 6c541b4951a465feb5e44f46a76f92aa81b64a66..a11a44ecae018119c132baa7eae352f93cdd70c8 100644
--- a/boards/uniboard1/designs/unb1_ddr3_transpose/hdllib.cfg
+++ b/boards/uniboard1/designs/unb1_ddr3_transpose/hdllib.cfg
@@ -38,3 +38,5 @@ quartus_qip_files =
$HDL_BUILD_DIR/unb1/quartus/unb1_ddr3_transpose/sopc_unb_ddr3_transpose.qip
$RADIOHDL_WORK/libraries/technology/ip_stratixiv/ddr3_uphy_4g_800_master/generated/ip_stratixiv_ddr3_uphy_4g_800_master.qip
+nios2_app_userflags = -DCOMPILE_FOR_SOPC
+
diff --git a/boards/uniboard1/designs/unb1_fn_terminal_db/hdllib.cfg b/boards/uniboard1/designs/unb1_fn_terminal_db/hdllib.cfg
index d956258b51215f3823a2536e2c3759685ac28fdd..6dcd96169c9a5af2ae6252b2f6d1654f38ebb97a 100644
--- a/boards/uniboard1/designs/unb1_fn_terminal_db/hdllib.cfg
+++ b/boards/uniboard1/designs/unb1_fn_terminal_db/hdllib.cfg
@@ -31,3 +31,6 @@ quartus_tcl_files =
quartus_qip_files =
$HDL_BUILD_DIR/unb1/quartus/unb1_fn_terminal_db/sopc_unb1_fn_terminal_db.qip
+
+nios2_app_userflags = -DCOMPILE_FOR_SOPC
+
diff --git a/boards/uniboard1/designs/unb1_heater/hdllib.cfg b/boards/uniboard1/designs/unb1_heater/hdllib.cfg
index 84640d28b1f24371368fcc37615c0e667423865e..0a1fcb2605e6cc86fed626b3a4c8e11a4134ca9d 100644
--- a/boards/uniboard1/designs/unb1_heater/hdllib.cfg
+++ b/boards/uniboard1/designs/unb1_heater/hdllib.cfg
@@ -36,3 +36,6 @@ quartus_vhdl_files =
quartus_qip_files =
$HDL_BUILD_DIR/unb1/quartus/unb1_heater/qsys_unb1_heater/synthesis/qsys_unb1_heater.qip
+
+nios2_app_userflags = -DCOMPILE_FOR_QSYS
+
diff --git a/boards/uniboard1/designs/unb1_minimal/revisions/unb1_minimal_mm_arbiter/hdllib.cfg b/boards/uniboard1/designs/unb1_minimal/revisions/unb1_minimal_mm_arbiter/hdllib.cfg
index 46135b978828b79f203bfaec21fdbcb86d7ee280..deb47a3d479505985aeda879aa9429b3f4affa6e 100644
--- a/boards/uniboard1/designs/unb1_minimal/revisions/unb1_minimal_mm_arbiter/hdllib.cfg
+++ b/boards/uniboard1/designs/unb1_minimal/revisions/unb1_minimal_mm_arbiter/hdllib.cfg
@@ -34,3 +34,6 @@ quartus_vhdl_files =
quartus_qip_files =
$HDL_BUILD_DIR/unb1/quartus/unb1_minimal_mm_arbiter/qsys_unb1_minimal_mm_arbiter/synthesis/qsys_unb1_minimal_mm_arbiter.qip
+
+nios2_app_userflags = -DCOMPILE_FOR_QSYS
+
diff --git a/boards/uniboard1/designs/unb1_minimal/revisions/unb1_minimal_qsys/hdllib.cfg b/boards/uniboard1/designs/unb1_minimal/revisions/unb1_minimal_qsys/hdllib.cfg
index 30e64fde99c4f6fb2dd6017ffdf47ddaf690fcc7..fe15d426ddfcafe3c9476aa1a7fbee75533c0bee 100644
--- a/boards/uniboard1/designs/unb1_minimal/revisions/unb1_minimal_qsys/hdllib.cfg
+++ b/boards/uniboard1/designs/unb1_minimal/revisions/unb1_minimal_qsys/hdllib.cfg
@@ -37,3 +37,5 @@ quartus_vhdl_files =
quartus_qip_files =
$HDL_BUILD_DIR/unb1/quartus/unb1_minimal_qsys/qsys_unb1_minimal/synthesis/qsys_unb1_minimal.qip
+nios2_app_userflags = -DCOMPILE_FOR_QSYS
+
diff --git a/boards/uniboard1/designs/unb1_minimal/revisions/unb1_minimal_qsys_wo_pll/hdllib.cfg b/boards/uniboard1/designs/unb1_minimal/revisions/unb1_minimal_qsys_wo_pll/hdllib.cfg
index 8feddd68dcf48c586db3b8a2306966a2cf3d96b7..c338c16de20ea62f1a58bd30c10ea1106194e8a4 100644
--- a/boards/uniboard1/designs/unb1_minimal/revisions/unb1_minimal_qsys_wo_pll/hdllib.cfg
+++ b/boards/uniboard1/designs/unb1_minimal/revisions/unb1_minimal_qsys_wo_pll/hdllib.cfg
@@ -35,3 +35,6 @@ quartus_vhdl_files =
quartus_qip_files =
$HDL_BUILD_DIR/unb1/quartus/unb1_minimal_qsys_wo_pll/qsys_wo_pll_unb1_minimal/synthesis/qsys_wo_pll_unb1_minimal.qip
+
+nios2_app_userflags = -DCOMPILE_FOR_QSYS
+
diff --git a/boards/uniboard1/designs/unb1_minimal/revisions/unb1_minimal_sopc/hdllib.cfg b/boards/uniboard1/designs/unb1_minimal/revisions/unb1_minimal_sopc/hdllib.cfg
index 2724f918e6875d03654ef80ddaa0c8bb8cfcc16b..9bc3748356d2625dae7d81a1463fbd4ea622a099 100644
--- a/boards/uniboard1/designs/unb1_minimal/revisions/unb1_minimal_sopc/hdllib.cfg
+++ b/boards/uniboard1/designs/unb1_minimal/revisions/unb1_minimal_sopc/hdllib.cfg
@@ -34,3 +34,5 @@ quartus_vhdl_files =
quartus_qip_files =
$HDL_BUILD_DIR/unb1/quartus/unb1_minimal_sopc/sopc_unb1_minimal.qip
+nios2_app_userflags = -DCOMPILE_FOR_SOPC
+
diff --git a/boards/uniboard1/designs/unb1_terminal_bg_mesh_db/hdllib.cfg b/boards/uniboard1/designs/unb1_terminal_bg_mesh_db/hdllib.cfg
index f34d0b341d4591c8fc614498aecc2b4c347bd0ba..57bf8b965b993c8dedd6058ac05fcfff31970a38 100644
--- a/boards/uniboard1/designs/unb1_terminal_bg_mesh_db/hdllib.cfg
+++ b/boards/uniboard1/designs/unb1_terminal_bg_mesh_db/hdllib.cfg
@@ -34,3 +34,6 @@ quartus_qip_files =
quartus_sdc_files =
$RADIOHDL_WORK/boards/uniboard1/libraries/unb1_board/quartus/unb1_board.sdc
+
+nios2_app_userflags = -DCOMPILE_FOR_QSYS
+
diff --git a/boards/uniboard1/designs/unb1_test/revisions/unb1_test_10GbE/hdllib.cfg b/boards/uniboard1/designs/unb1_test/revisions/unb1_test_10GbE/hdllib.cfg
index 790c2fcb41f9e800bb1d4dc7df836e02006dc136..6cd3f1ca727cd5d7e10a62b620790d008150b61c 100644
--- a/boards/uniboard1/designs/unb1_test/revisions/unb1_test_10GbE/hdllib.cfg
+++ b/boards/uniboard1/designs/unb1_test/revisions/unb1_test_10GbE/hdllib.cfg
@@ -37,3 +37,6 @@ quartus_vhdl_files =
quartus_qip_files =
$HDL_BUILD_DIR/unb1/quartus/unb1_test_10GbE/qsys_unb1_test/synthesis/qsys_unb1_test.qip
+
+nios2_app_userflags = -DCOMPILE_FOR_QSYS
+
diff --git a/boards/uniboard1/designs/unb1_test/revisions/unb1_test_10GbE_tx_only/hdllib.cfg b/boards/uniboard1/designs/unb1_test/revisions/unb1_test_10GbE_tx_only/hdllib.cfg
index fc2febb4543d8b3d8438bc6bb9f23b2eecde60a8..6a8245325ddcec9eb168109d0b005e22817e41a4 100644
--- a/boards/uniboard1/designs/unb1_test/revisions/unb1_test_10GbE_tx_only/hdllib.cfg
+++ b/boards/uniboard1/designs/unb1_test/revisions/unb1_test_10GbE_tx_only/hdllib.cfg
@@ -37,3 +37,6 @@ quartus_vhdl_files =
quartus_qip_files =
$HDL_BUILD_DIR/unb1/quartus/unb1_test_10GbE_tx_only/qsys_unb1_test/synthesis/qsys_unb1_test.qip
+
+nios2_app_userflags = -DCOMPILE_FOR_QSYS
+
diff --git a/boards/uniboard1/designs/unb1_test/revisions/unb1_test_1GbE/hdllib.cfg b/boards/uniboard1/designs/unb1_test/revisions/unb1_test_1GbE/hdllib.cfg
index 78f41d558fcee7eb46f599697fb9c8361e68d57f..b1a6665e016758d1b7601d358415d06df72768bb 100644
--- a/boards/uniboard1/designs/unb1_test/revisions/unb1_test_1GbE/hdllib.cfg
+++ b/boards/uniboard1/designs/unb1_test/revisions/unb1_test_1GbE/hdllib.cfg
@@ -37,3 +37,6 @@ quartus_vhdl_files =
quartus_qip_files =
$HDL_BUILD_DIR/unb1/quartus/unb1_test_1GbE/qsys_unb1_test/synthesis/qsys_unb1_test.qip
+
+nios2_app_userflags = -DCOMPILE_FOR_QSYS
+
diff --git a/boards/uniboard1/designs/unb1_test/revisions/unb1_test_all/hdllib.cfg b/boards/uniboard1/designs/unb1_test/revisions/unb1_test_all/hdllib.cfg
index f5dcccf80cfa68ebea0b8c3ea7b83b37ed9705b0..67096db24e832cab2768d5d87d6e4cd704e2560a 100644
--- a/boards/uniboard1/designs/unb1_test/revisions/unb1_test_all/hdllib.cfg
+++ b/boards/uniboard1/designs/unb1_test/revisions/unb1_test_all/hdllib.cfg
@@ -44,3 +44,6 @@ quartus_qip_files =
$RADIOHDL_WORK/libraries/technology/ip_stratixiv/ddr3_uphy_4g_800_master/generated/ip_stratixiv_ddr3_uphy_4g_800_master.qip
#$RADIOHDL_WORK/libraries/technology/ip_stratixiv/ddr3_uphy_4g_800_slave/generated/ip_stratixiv_ddr3_uphy_4g_800_slave.qip
+
+nios2_app_userflags = -DCOMPILE_FOR_QSYS
+
diff --git a/boards/uniboard1/designs/unb1_test/revisions/unb1_test_ddr/hdllib.cfg b/boards/uniboard1/designs/unb1_test/revisions/unb1_test_ddr/hdllib.cfg
index 8363cba5b7eff9e0815743b5626aed11aec9bf4d..b45e077994fae004797ae94ae77f3b8354ac97f6 100644
--- a/boards/uniboard1/designs/unb1_test/revisions/unb1_test_ddr/hdllib.cfg
+++ b/boards/uniboard1/designs/unb1_test/revisions/unb1_test_ddr/hdllib.cfg
@@ -44,3 +44,6 @@ quartus_qip_files =
$RADIOHDL_WORK/libraries/technology/ip_stratixiv/ddr3_uphy_4g_800_master/generated/ip_stratixiv_ddr3_uphy_4g_800_master.qip
#$RADIOHDL_WORK/libraries/technology/ip_stratixiv/ddr3_uphy_4g_800_slave/generated/ip_stratixiv_ddr3_uphy_4g_800_slave.qip
+
+nios2_app_userflags = -DCOMPILE_FOR_QSYS
+
diff --git a/boards/uniboard1/designs/unb1_test/revisions/unb1_test_ddr_16g_MB_I/hdllib.cfg b/boards/uniboard1/designs/unb1_test/revisions/unb1_test_ddr_16g_MB_I/hdllib.cfg
index f768ee780f309b1a3a57ac3aa8739dbc2583fae6..984c18f3c3217156bc09c8df7abf3968dcf61fd8 100644
--- a/boards/uniboard1/designs/unb1_test/revisions/unb1_test_ddr_16g_MB_I/hdllib.cfg
+++ b/boards/uniboard1/designs/unb1_test/revisions/unb1_test_ddr_16g_MB_I/hdllib.cfg
@@ -44,3 +44,6 @@ quartus_qip_files =
$HDL_BUILD_DIR/unb1/quartus/unb1_test_ddr_16g_MB_I/qsys_unb1_test/synthesis/qsys_unb1_test.qip
$RADIOHDL_WORK/libraries/technology/ip_stratixiv/ddr3_uphy_16g_dual_rank_800/generated/ip_stratixiv_ddr3_uphy_16g_dual_rank_800.qip
+
+nios2_app_userflags = -DCOMPILE_FOR_QSYS
+
diff --git a/boards/uniboard1/designs/unb1_test/revisions/unb1_test_ddr_16g_MB_II/hdllib.cfg b/boards/uniboard1/designs/unb1_test/revisions/unb1_test_ddr_16g_MB_II/hdllib.cfg
index 131abe1162f57a1b16704f75aeebb6663329cd07..0f81d335343749658dff77747959f472baeb44cf 100644
--- a/boards/uniboard1/designs/unb1_test/revisions/unb1_test_ddr_16g_MB_II/hdllib.cfg
+++ b/boards/uniboard1/designs/unb1_test/revisions/unb1_test_ddr_16g_MB_II/hdllib.cfg
@@ -43,3 +43,6 @@ quartus_qip_files =
$HDL_BUILD_DIR/unb1/quartus/unb1_test_ddr_16g_MB_II/qsys_unb1_test/synthesis/qsys_unb1_test.qip
$RADIOHDL_WORK/libraries/technology/ip_stratixiv/ddr3_uphy_16g_dual_rank_800/generated/ip_stratixiv_ddr3_uphy_16g_dual_rank_800.qip
+
+nios2_app_userflags = -DCOMPILE_FOR_QSYS
+
diff --git a/boards/uniboard1/designs/unb1_test/revisions/unb1_test_ddr_16g_MB_I_II/hdllib.cfg b/boards/uniboard1/designs/unb1_test/revisions/unb1_test_ddr_16g_MB_I_II/hdllib.cfg
index 3c9364d69e79fcac863e1974cc4aaf7e828abfbe..a3dc5f59d03db5ca26ed308fbc06c56a0f7f0256 100644
--- a/boards/uniboard1/designs/unb1_test/revisions/unb1_test_ddr_16g_MB_I_II/hdllib.cfg
+++ b/boards/uniboard1/designs/unb1_test/revisions/unb1_test_ddr_16g_MB_I_II/hdllib.cfg
@@ -43,3 +43,6 @@ quartus_qip_files =
$HDL_BUILD_DIR/unb1/quartus/unb1_test_ddr_16g_MB_I_II/qsys_unb1_test/synthesis/qsys_unb1_test.qip
$RADIOHDL_WORK/libraries/technology/ip_stratixiv/ddr3_uphy_16g_dual_rank_800/generated/ip_stratixiv_ddr3_uphy_16g_dual_rank_800.qip
+
+nios2_app_userflags = -DCOMPILE_FOR_QSYS
+
diff --git a/boards/uniboard1/designs/unb1_test/revisions/unb1_test_ddr_MB_I/hdllib.cfg b/boards/uniboard1/designs/unb1_test/revisions/unb1_test_ddr_MB_I/hdllib.cfg
index 2f10f4fbe89f05c8023c5aaa6017ce74f9251a09..3c0d599d00f27dc74d01aed02a779b93e97aff10 100644
--- a/boards/uniboard1/designs/unb1_test/revisions/unb1_test_ddr_MB_I/hdllib.cfg
+++ b/boards/uniboard1/designs/unb1_test/revisions/unb1_test_ddr_MB_I/hdllib.cfg
@@ -43,3 +43,5 @@ quartus_qip_files =
$HDL_BUILD_DIR/unb1/quartus/unb1_test_ddr_MB_I/qsys_unb1_test/synthesis/qsys_unb1_test.qip
$RADIOHDL_WORK/libraries/technology/ip_stratixiv/ddr3_uphy_4g_single_rank_800_master/generated/ip_stratixiv_ddr3_uphy_4g_single_rank_800_master.qip
+nios2_app_userflags = -DCOMPILE_FOR_QSYS
+
diff --git a/boards/uniboard1/designs/unb1_test/revisions/unb1_test_ddr_MB_II/hdllib.cfg b/boards/uniboard1/designs/unb1_test/revisions/unb1_test_ddr_MB_II/hdllib.cfg
index 7fe0acbd0a30d419763b330aa9d154af6bfb0a6d..2141317b49815d07b95903b43c2a39e0b4fcf437 100644
--- a/boards/uniboard1/designs/unb1_test/revisions/unb1_test_ddr_MB_II/hdllib.cfg
+++ b/boards/uniboard1/designs/unb1_test/revisions/unb1_test_ddr_MB_II/hdllib.cfg
@@ -43,3 +43,5 @@ quartus_qip_files =
$HDL_BUILD_DIR/unb1/quartus/unb1_test_ddr_MB_II/qsys_unb1_test/synthesis/qsys_unb1_test.qip
$RADIOHDL_WORK/libraries/technology/ip_stratixiv/ddr3_uphy_4g_single_rank_800_master/generated/ip_stratixiv_ddr3_uphy_4g_single_rank_800_master.qip
+nios2_app_userflags = -DCOMPILE_FOR_QSYS
+
diff --git a/boards/uniboard1/designs/unb1_test/revisions/unb1_test_ddr_MB_I_II/hdllib.cfg b/boards/uniboard1/designs/unb1_test/revisions/unb1_test_ddr_MB_I_II/hdllib.cfg
index b0b65d13271097e25c698ac2345c25d41b288075..fc8059c27da1138b6af034ebf7fd24ca64fa56f6 100644
--- a/boards/uniboard1/designs/unb1_test/revisions/unb1_test_ddr_MB_I_II/hdllib.cfg
+++ b/boards/uniboard1/designs/unb1_test/revisions/unb1_test_ddr_MB_I_II/hdllib.cfg
@@ -42,3 +42,5 @@ quartus_qip_files =
$HDL_BUILD_DIR/unb1/quartus/unb1_test_ddr_MB_I_II/qsys_unb1_test/synthesis/qsys_unb1_test.qip
$RADIOHDL_WORK/libraries/technology/ip_stratixiv/ddr3_uphy_4g_single_rank_800_master/generated/ip_stratixiv_ddr3_uphy_4g_single_rank_800_master.qip
+nios2_app_userflags = -DCOMPILE_FOR_QSYS
+
diff --git a/boards/uniboard1/designs/unb1_tr_10GbE/hdllib.cfg b/boards/uniboard1/designs/unb1_tr_10GbE/hdllib.cfg
index 0e0b26f797deda2dc27141fdfa88b63ae5d707b4..16d1b7fe347d3e025df99e437657a831b8bf3d6e 100644
--- a/boards/uniboard1/designs/unb1_tr_10GbE/hdllib.cfg
+++ b/boards/uniboard1/designs/unb1_tr_10GbE/hdllib.cfg
@@ -38,3 +38,6 @@ quartus_qip_files =
quartus_sdc_files =
$RADIOHDL_WORK/boards/uniboard1/libraries/unb1_board/quartus/unb1_board.sdc
+
+nios2_app_userflags = -DCOMPILE_FOR_QSYS
+
diff --git a/boards/uniboard2/designs/unb2_led/hdllib.cfg b/boards/uniboard2/designs/unb2_led/hdllib.cfg
index 31c102a23c0eef5d75482debc578759a3d2955ce..5ee94b1931ee6dd8e2c2229ef13d513b432ee9e5 100644
--- a/boards/uniboard2/designs/unb2_led/hdllib.cfg
+++ b/boards/uniboard2/designs/unb2_led/hdllib.cfg
@@ -32,3 +32,6 @@ quartus_vhdl_files =
quartus_qip_files =
+
+nios2_app_userflags = -DCOMPILE_FOR_GEN2_UNB2
+
diff --git a/boards/uniboard2/designs/unb2_minimal/hdllib.cfg b/boards/uniboard2/designs/unb2_minimal/hdllib.cfg
index 3c8171266d0b37a55e93d812322c11ee8eda347e..baf6be9c0fda52ee72fe1e7846fd3228eb915c80 100644
--- a/boards/uniboard2/designs/unb2_minimal/hdllib.cfg
+++ b/boards/uniboard2/designs/unb2_minimal/hdllib.cfg
@@ -36,3 +36,6 @@ quartus_vhdl_files =
quartus_qip_files =
$HDL_BUILD_DIR/unb2/quartus/unb2_minimal/qsys_unb2_minimal/synthesis/qsys_unb2_minimal.qip
+
+nios2_app_userflags = -DCOMPILE_FOR_GEN2_UNB2
+
diff --git a/boards/uniboard2/designs/unb2_test/revisions/unb2_test_10GbE/hdllib.cfg b/boards/uniboard2/designs/unb2_test/revisions/unb2_test_10GbE/hdllib.cfg
index 2835bf9b43aa738805850d4feb48a00db9208ebd..11d333fa4a8db05cc7fb60edf295302958d89ec6 100644
--- a/boards/uniboard2/designs/unb2_test/revisions/unb2_test_10GbE/hdllib.cfg
+++ b/boards/uniboard2/designs/unb2_test/revisions/unb2_test_10GbE/hdllib.cfg
@@ -57,3 +57,6 @@ quartus_vhdl_files =
quartus_qip_files =
$HDL_BUILD_DIR/unb2/quartus/unb2_test_10GbE/qsys_unb2_test/synthesis/qsys_unb2_test.qip
+
+nios2_app_userflags = -DCOMPILE_FOR_GEN2_UNB2
+
diff --git a/boards/uniboard2/designs/unb2_test/revisions/unb2_test_1GbE/hdllib.cfg b/boards/uniboard2/designs/unb2_test/revisions/unb2_test_1GbE/hdllib.cfg
index a5ce4f51a9f44e307e3541811430fdce8d8bca12..29426ebaefb735a48310cc43360a7cd29c7fba0f 100644
--- a/boards/uniboard2/designs/unb2_test/revisions/unb2_test_1GbE/hdllib.cfg
+++ b/boards/uniboard2/designs/unb2_test/revisions/unb2_test_1GbE/hdllib.cfg
@@ -36,3 +36,6 @@ quartus_vhdl_files =
quartus_qip_files =
$HDL_BUILD_DIR/unb2/quartus/unb2_test_1GbE/qsys_unb2_test/synthesis/qsys_unb2_test.qip
+
+nios2_app_userflags = -DCOMPILE_FOR_GEN2_UNB2
+
diff --git a/boards/uniboard2/designs/unb2_test/revisions/unb2_test_all/hdllib.cfg b/boards/uniboard2/designs/unb2_test/revisions/unb2_test_all/hdllib.cfg
index 00625f07ebe1be9b0d076d305d830d99107f4d98..49cb72afe5e583f8097524505ed2cb450f1c78fd 100644
--- a/boards/uniboard2/designs/unb2_test/revisions/unb2_test_all/hdllib.cfg
+++ b/boards/uniboard2/designs/unb2_test/revisions/unb2_test_all/hdllib.cfg
@@ -62,3 +62,6 @@ quartus_vhdl_files =
quartus_qip_files =
$HDL_BUILD_DIR/unb2/quartus/unb2_test_all/qsys_unb2_test/synthesis/qsys_unb2_test.qip
+
+nios2_app_userflags = -DCOMPILE_FOR_GEN2_UNB2
+
diff --git a/boards/uniboard2/designs/unb2_test/revisions/unb2_test_ddr_MB_I/hdllib.cfg b/boards/uniboard2/designs/unb2_test/revisions/unb2_test_ddr_MB_I/hdllib.cfg
index 67f20d9e4fcb9fc1243fc6df6d57e79e3695f520..32d7e2b66d0d2947e519ff5b7a56a9aff8f834f3 100644
--- a/boards/uniboard2/designs/unb2_test/revisions/unb2_test_ddr_MB_I/hdllib.cfg
+++ b/boards/uniboard2/designs/unb2_test/revisions/unb2_test_ddr_MB_I/hdllib.cfg
@@ -44,3 +44,5 @@ quartus_tcl_files =
quartus_sdc_files =
$RADIOHDL_WORK/boards/uniboard2/libraries/unb2_board/quartus/unb2_board.sdc
+nios2_app_userflags = -DCOMPILE_FOR_GEN2_UNB2
+
diff --git a/boards/uniboard2/designs/unb2_test/revisions/unb2_test_ddr_MB_II/hdllib.cfg b/boards/uniboard2/designs/unb2_test/revisions/unb2_test_ddr_MB_II/hdllib.cfg
index 34036c3461684a30fa3f61fed6045a143ccf7bfd..e7f73d38757f87d359b30281b3212b11ac8f9a33 100644
--- a/boards/uniboard2/designs/unb2_test/revisions/unb2_test_ddr_MB_II/hdllib.cfg
+++ b/boards/uniboard2/designs/unb2_test/revisions/unb2_test_ddr_MB_II/hdllib.cfg
@@ -44,3 +44,5 @@ quartus_tcl_files =
quartus_sdc_files =
$RADIOHDL_WORK/boards/uniboard2/libraries/unb2_board/quartus/unb2_board.sdc
+nios2_app_userflags = -DCOMPILE_FOR_GEN2_UNB2
+
diff --git a/boards/uniboard2/designs/unb2_test/revisions/unb2_test_ddr_MB_I_II/hdllib.cfg b/boards/uniboard2/designs/unb2_test/revisions/unb2_test_ddr_MB_I_II/hdllib.cfg
index a42629b841592f4cf3dd34787b94e05486033c1a..4c2b30eb68315146bf192916426ea47681cfaced 100644
--- a/boards/uniboard2/designs/unb2_test/revisions/unb2_test_ddr_MB_I_II/hdllib.cfg
+++ b/boards/uniboard2/designs/unb2_test/revisions/unb2_test_ddr_MB_I_II/hdllib.cfg
@@ -44,3 +44,5 @@ quartus_tcl_files =
quartus_sdc_files =
$RADIOHDL_WORK/boards/uniboard2/libraries/unb2_board/quartus/unb2_board.sdc
+nios2_app_userflags = -DCOMPILE_FOR_GEN2_UNB2
+
diff --git a/boards/uniboard2a/designs/unb2a_heater/hdllib.cfg b/boards/uniboard2a/designs/unb2a_heater/hdllib.cfg
index 2c8fffa2567b94f4373c5b160b39b0a79d10acad..93adc2818af06c42526e4a54afdf0765fa6c4239 100644
--- a/boards/uniboard2a/designs/unb2a_heater/hdllib.cfg
+++ b/boards/uniboard2a/designs/unb2a_heater/hdllib.cfg
@@ -36,3 +36,5 @@ quartus_vhdl_files =
quartus_qip_files =
$HDL_BUILD_DIR/unb2a/quartus/unb2a_heater/qsys_unb2a_heater/synthesis/qsys_unb2a_heater.qip
+nios2_app_userflags = -DCOMPILE_FOR_GEN2_UNB2
+
diff --git a/boards/uniboard2a/designs/unb2a_led/hdllib.cfg b/boards/uniboard2a/designs/unb2a_led/hdllib.cfg
index 9060d3ba0226850dfcc6b7d0a48cf9b8c54d9be0..9d75b890c296ee991fcb46050c4b5fd41e2387b8 100644
--- a/boards/uniboard2a/designs/unb2a_led/hdllib.cfg
+++ b/boards/uniboard2a/designs/unb2a_led/hdllib.cfg
@@ -32,3 +32,5 @@ quartus_vhdl_files =
quartus_qip_files =
+nios2_app_userflags = -DCOMPILE_FOR_GEN2_UNB2
+
diff --git a/boards/uniboard2a/designs/unb2a_minimal/hdllib.cfg b/boards/uniboard2a/designs/unb2a_minimal/hdllib.cfg
index c569e3b68489b43f8812a797fc3f5d81fb323c76..5fdd289221b68399510cec10cc970efa064c89b8 100644
--- a/boards/uniboard2a/designs/unb2a_minimal/hdllib.cfg
+++ b/boards/uniboard2a/designs/unb2a_minimal/hdllib.cfg
@@ -36,3 +36,5 @@ quartus_vhdl_files =
quartus_qip_files =
$HDL_BUILD_DIR/unb2a/quartus/unb2a_minimal/qsys_unb2a_minimal/synthesis/qsys_unb2a_minimal.qip
+nios2_app_userflags = -DCOMPILE_FOR_GEN2_UNB2
+
diff --git a/boards/uniboard2a/designs/unb2a_test/revisions/unb2a_test_10GbE/hdllib.cfg b/boards/uniboard2a/designs/unb2a_test/revisions/unb2a_test_10GbE/hdllib.cfg
index f9c0677edd282d054aec4574f72e2c5bca6cbdf6..8529b7eb5db2adf22b31c8623beaa068165f4d88 100644
--- a/boards/uniboard2a/designs/unb2a_test/revisions/unb2a_test_10GbE/hdllib.cfg
+++ b/boards/uniboard2a/designs/unb2a_test/revisions/unb2a_test_10GbE/hdllib.cfg
@@ -60,3 +60,6 @@ quartus_vhdl_files =
quartus_qip_files =
$HDL_BUILD_DIR/unb2a/quartus/unb2a_test_10GbE/qsys_unb2a_test/synthesis/qsys_unb2a_test.qip
+
+nios2_app_userflags = -DCOMPILE_FOR_GEN2_UNB2
+
diff --git a/boards/uniboard2a/designs/unb2a_test/revisions/unb2a_test_1GbE/hdllib.cfg b/boards/uniboard2a/designs/unb2a_test/revisions/unb2a_test_1GbE/hdllib.cfg
index cbc5c0292e5654e754366b910d623ac62f99f140..22de500f6e73eafba43ccdf186250ea7cccbb503 100644
--- a/boards/uniboard2a/designs/unb2a_test/revisions/unb2a_test_1GbE/hdllib.cfg
+++ b/boards/uniboard2a/designs/unb2a_test/revisions/unb2a_test_1GbE/hdllib.cfg
@@ -36,3 +36,6 @@ quartus_vhdl_files =
quartus_qip_files =
$HDL_BUILD_DIR/unb2a/quartus/unb2a_test_1GbE/qsys_unb2a_test/synthesis/qsys_unb2a_test.qip
+
+nios2_app_userflags = -DCOMPILE_FOR_GEN2_UNB2
+
diff --git a/boards/uniboard2a/designs/unb2a_test/revisions/unb2a_test_all/hdllib.cfg b/boards/uniboard2a/designs/unb2a_test/revisions/unb2a_test_all/hdllib.cfg
index 68466090d055001f770faeb9b4985170f164f434..bc11b4b0367248efe478d2a0c0adc26b74332445 100644
--- a/boards/uniboard2a/designs/unb2a_test/revisions/unb2a_test_all/hdllib.cfg
+++ b/boards/uniboard2a/designs/unb2a_test/revisions/unb2a_test_all/hdllib.cfg
@@ -63,3 +63,6 @@ quartus_vhdl_files =
quartus_qip_files =
$HDL_BUILD_DIR/unb2a/quartus/unb2a_test_all/qsys_unb2a_test/synthesis/qsys_unb2a_test.qip
+
+nios2_app_userflags = -DCOMPILE_FOR_GEN2_UNB2
+
diff --git a/boards/uniboard2a/designs/unb2a_test/revisions/unb2a_test_ddr_MB_I/hdllib.cfg b/boards/uniboard2a/designs/unb2a_test/revisions/unb2a_test_ddr_MB_I/hdllib.cfg
index a7a4643277e802d9ec2e9e418898cc6cd935b93d..79cbeb53282b4d69aaa07577b49feb5a095ce93b 100644
--- a/boards/uniboard2a/designs/unb2a_test/revisions/unb2a_test_ddr_MB_I/hdllib.cfg
+++ b/boards/uniboard2a/designs/unb2a_test/revisions/unb2a_test_ddr_MB_I/hdllib.cfg
@@ -45,3 +45,5 @@ quartus_tcl_files =
quartus_sdc_files =
$RADIOHDL_WORK/boards/uniboard2a/libraries/unb2a_board/quartus/unb2a_board.sdc
+nios2_app_userflags = -DCOMPILE_FOR_GEN2_UNB2
+
diff --git a/boards/uniboard2a/designs/unb2a_test/revisions/unb2a_test_ddr_MB_II/hdllib.cfg b/boards/uniboard2a/designs/unb2a_test/revisions/unb2a_test_ddr_MB_II/hdllib.cfg
index 4030938bace3cdce3e0aca36d45776687c399ad2..ff9a3d4b7a62ce2410a18bfc89d680a43f717bbd 100644
--- a/boards/uniboard2a/designs/unb2a_test/revisions/unb2a_test_ddr_MB_II/hdllib.cfg
+++ b/boards/uniboard2a/designs/unb2a_test/revisions/unb2a_test_ddr_MB_II/hdllib.cfg
@@ -45,3 +45,5 @@ quartus_tcl_files =
quartus_sdc_files =
$RADIOHDL_WORK/boards/uniboard2a/libraries/unb2a_board/quartus/unb2a_board.sdc
+nios2_app_userflags = -DCOMPILE_FOR_GEN2_UNB2
+
diff --git a/boards/uniboard2a/designs/unb2a_test/revisions/unb2a_test_ddr_MB_I_II/hdllib.cfg b/boards/uniboard2a/designs/unb2a_test/revisions/unb2a_test_ddr_MB_I_II/hdllib.cfg
index 8b25ef236f7fb6309aa6ad9a9a9d838c4f1820ba..2b8b063d7e0a47e390f5ff875de6dda4b745a0ef 100644
--- a/boards/uniboard2a/designs/unb2a_test/revisions/unb2a_test_ddr_MB_I_II/hdllib.cfg
+++ b/boards/uniboard2a/designs/unb2a_test/revisions/unb2a_test_ddr_MB_I_II/hdllib.cfg
@@ -45,3 +45,5 @@ quartus_tcl_files =
quartus_sdc_files =
$RADIOHDL_WORK/boards/uniboard2a/libraries/unb2a_board/quartus/unb2a_board.sdc
+nios2_app_userflags = -DCOMPILE_FOR_GEN2_UNB2
+
diff --git a/boards/uniboard2b/designs/unb2b_heater/hdllib.cfg b/boards/uniboard2b/designs/unb2b_heater/hdllib.cfg
index 73def4af4691789b3300fa03b544c9ab57ea2e7c..7910f1251ad007756f7e794c37a8b35fe4234444 100644
--- a/boards/uniboard2b/designs/unb2b_heater/hdllib.cfg
+++ b/boards/uniboard2b/designs/unb2b_heater/hdllib.cfg
@@ -36,3 +36,5 @@ quartus_vhdl_files =
quartus_qip_files =
$HDL_BUILD_DIR/unb2b/quartus/unb2b_heater/qsys_unb2b_heater/qsys_unb2b_heater.qip
+nios2_app_userflags = -DCOMPILE_FOR_GEN2_UNB2
+
diff --git a/boards/uniboard2b/designs/unb2b_minimal/hdllib.cfg b/boards/uniboard2b/designs/unb2b_minimal/hdllib.cfg
index 213b7154455f891fd12eeedd3d7bed6f3f94dd4a..2c45357259da3a446c7053a7f5899e46ce764d81 100644
--- a/boards/uniboard2b/designs/unb2b_minimal/hdllib.cfg
+++ b/boards/uniboard2b/designs/unb2b_minimal/hdllib.cfg
@@ -37,6 +37,5 @@ quartus_vhdl_files =
quartus_qip_files =
$HDL_BUILD_DIR/unb2b/quartus/unb2b_minimal/qsys_unb2b_minimal/qsys_unb2b_minimal.qip
-nios2_app_userflags =
- "use=gen2"
+nios2_app_userflags = -DCOMPILE_FOR_GEN2_UNB2
diff --git a/boards/uniboard2b/designs/unb2b_test/revisions/unb2b_test_10GbE/hdllib.cfg b/boards/uniboard2b/designs/unb2b_test/revisions/unb2b_test_10GbE/hdllib.cfg
index 8d7faee81bd9a2d92aeb0d401134c5bcab5db331..02c44bf134a4b7bef4135f0391c3b9bb8699f00b 100644
--- a/boards/uniboard2b/designs/unb2b_test/revisions/unb2b_test_10GbE/hdllib.cfg
+++ b/boards/uniboard2b/designs/unb2b_test/revisions/unb2b_test_10GbE/hdllib.cfg
@@ -61,3 +61,6 @@ quartus_vhdl_files =
quartus_qip_files =
$HDL_BUILD_DIR/unb2b/quartus/unb2b_test_10GbE/qsys_unb2b_test/qsys_unb2b_test.qip
+
+nios2_app_userflags = -DCOMPILE_FOR_GEN2_UNB2
+
diff --git a/libraries/base/dp/designs/unb1_dp_offload/hdllib.cfg b/libraries/base/dp/designs/unb1_dp_offload/hdllib.cfg
index 94b17e0841c475fa90fe58521f057d77a27affbf..0ac4f1ca44488f9f88f660c43fc7e67482662d23 100644
--- a/libraries/base/dp/designs/unb1_dp_offload/hdllib.cfg
+++ b/libraries/base/dp/designs/unb1_dp_offload/hdllib.cfg
@@ -36,3 +36,6 @@ quartus_vhdl_files =
quartus_qip_files =
$HDL_BUILD_DIR/unb1/quartus/unb1_dp_offload/sopc_unb1_dp_offload.qip
+
+nios2_app_userflags = -DCOMPILE_FOR_SOPC
+
diff --git a/libraries/dsp/bf/designs/unb1_fn_bf/hdllib.cfg b/libraries/dsp/bf/designs/unb1_fn_bf/hdllib.cfg
index b7626df3590b7e715529b4bef1ca1883d149c1d8..53b8ab7f7fbe2086c666d0c3b531de8fce09c795 100644
--- a/libraries/dsp/bf/designs/unb1_fn_bf/hdllib.cfg
+++ b/libraries/dsp/bf/designs/unb1_fn_bf/hdllib.cfg
@@ -33,3 +33,6 @@ quartus_tcl_files =
quartus_qip_files =
$HDL_BUILD_DIR/unb1/quartus/unb1_fn_bf/sopc_unb1_fn_bf.qip
+
+nios2_app_userflags = -DCOMPILE_FOR_SOPC
+
diff --git a/libraries/dsp/correlator/designs/unb1_correlator/hdllib.cfg b/libraries/dsp/correlator/designs/unb1_correlator/hdllib.cfg
index be1afe4a89ad54c26fca6a86b57dc909559d94e8..8850bc6d00096625d5260686a5d31d045338a5bf 100644
--- a/libraries/dsp/correlator/designs/unb1_correlator/hdllib.cfg
+++ b/libraries/dsp/correlator/designs/unb1_correlator/hdllib.cfg
@@ -32,3 +32,6 @@ quartus_vhdl_files =
quartus_qip_files =
$HDL_BUILD_DIR/unb1/quartus/unb1_correlator/qsys_unb1_correlator/synthesis/qsys_unb1_correlator.qip
+
+nios2_app_userflags = -DCOMPILE_FOR_QSYS
+
diff --git a/libraries/io/eth/designs/unb1_eth_10g/hdllib.cfg b/libraries/io/eth/designs/unb1_eth_10g/hdllib.cfg
index 062af006fcfc12e03263e0a5622207dd98421aa4..c8bef4e2c3ba35ac5dcd190f8a40047279d5ff7e 100644
--- a/libraries/io/eth/designs/unb1_eth_10g/hdllib.cfg
+++ b/libraries/io/eth/designs/unb1_eth_10g/hdllib.cfg
@@ -30,3 +30,6 @@ quartus_qip_files = $HDL_BUILD_DIR/unb1/quartus/unb1_eth_10g/qsys_unb1_eth_10g/s
quartus_sdc_files =
$RADIOHDL_WORK/boards/uniboard1/libraries/unb1_board/quartus/unb1_board.sdc
+
+nios2_app_userflags = -DCOMPILE_FOR_QSYS
+
diff --git a/libraries/io/tr_xaui/hdllib.cfg b/libraries/io/tr_xaui/hdllib.cfg
index a74d5202f3743f0d5c2f4c761889f0fdd7995d46..a09ac0f8d4e2c4c7cb14ea4b69bd5eb2d698567d 100644
--- a/libraries/io/tr_xaui/hdllib.cfg
+++ b/libraries/io/tr_xaui/hdllib.cfg
@@ -2,7 +2,7 @@ hdl_lib_name = tr_xaui
hdl_library_clause_name = tr_xaui_lib
hdl_lib_uses_synth = common dp mdio diagnostics tech_xaui
hdl_lib_uses_sim =
-hdl_lib_technology = ip_stratixiv
+hdl_lib_technology =
synth_files =
src/vhdl/tr_xaui_deframer.vhd
diff --git a/libraries/technology/ip_arria10/clkbuf_global/hdllib.cfg b/libraries/technology/ip_arria10/clkbuf_global/hdllib.cfg
index e38e606ee6e735426a912c5499be80d51a91643a..d3d850ad78af1380552854cf8408013c43a0a0dd 100644
--- a/libraries/technology/ip_arria10/clkbuf_global/hdllib.cfg
+++ b/libraries/technology/ip_arria10/clkbuf_global/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_clkbuf_global.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_clkbuf_global.qsys
+
diff --git a/libraries/technology/ip_arria10/complex_mult/hdllib.cfg b/libraries/technology/ip_arria10/complex_mult/hdllib.cfg
index 09e6c2196de5c23b7e2a8dbb22fdc642ba91ea5b..b61b700ebc14cd241795b4e7c03098aa88475336 100644
--- a/libraries/technology/ip_arria10/complex_mult/hdllib.cfg
+++ b/libraries/technology/ip_arria10/complex_mult/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_complex_mult.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_complex_mult.qsys
+
diff --git a/libraries/technology/ip_arria10/ddio/hdllib.cfg b/libraries/technology/ip_arria10/ddio/hdllib.cfg
index b3a726e9aae11cd489522fe0666af1d239c2d94c..cdf478319d66ac57d73f8f0f9b5768961f614c45 100644
--- a/libraries/technology/ip_arria10/ddio/hdllib.cfg
+++ b/libraries/technology/ip_arria10/ddio/hdllib.cfg
@@ -20,3 +20,9 @@ modelsim_compile_ip_files =
quartus_qip_files =
generated/ip_arria10_ddio_in_1.qip
generated/ip_arria10_ddio_out_1.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_ddio_in_1.qsys
+ ip_arria10_ddio_out_1.qsys
+
diff --git a/libraries/technology/ip_arria10/ddr4_4g_1600/hdllib.cfg b/libraries/technology/ip_arria10/ddr4_4g_1600/hdllib.cfg
index bf240135084c43b5d81534fd6adce5fc3687fd0e..cd9ab6a0c9e0e45c06e15eb22b2fd16d59ca00fd 100644
--- a/libraries/technology/ip_arria10/ddr4_4g_1600/hdllib.cfg
+++ b/libraries/technology/ip_arria10/ddr4_4g_1600/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_ddr4_4g_1600.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_ddr4_4g_1600.qsys
+
diff --git a/libraries/technology/ip_arria10/ddr4_4g_2000/hdllib.cfg b/libraries/technology/ip_arria10/ddr4_4g_2000/hdllib.cfg
index 6b605ee02fcb6d736af6323c8911d4496289c29b..cf1a8b5f46641490bb5ed65b4beda8bb0d13eeb8 100644
--- a/libraries/technology/ip_arria10/ddr4_4g_2000/hdllib.cfg
+++ b/libraries/technology/ip_arria10/ddr4_4g_2000/hdllib.cfg
@@ -17,3 +17,7 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_ddr4_4g_2000.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_ddr4_4g_2000.qsys
diff --git a/libraries/technology/ip_arria10/ddr4_8g_2400/hdllib.cfg b/libraries/technology/ip_arria10/ddr4_8g_2400/hdllib.cfg
index 7272be213a74166afafdcdc64815219ca09e22fa..9883e05153ab7b07770370037e779776332aab98 100644
--- a/libraries/technology/ip_arria10/ddr4_8g_2400/hdllib.cfg
+++ b/libraries/technology/ip_arria10/ddr4_8g_2400/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_ddr4_8g_2400.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_ddr4_8g_2400.qsys
+
diff --git a/libraries/technology/ip_arria10/fifo/hdllib.cfg b/libraries/technology/ip_arria10/fifo/hdllib.cfg
index 12198c4f1cd7ab8e944cad3f4e3e9f2e27f5806c..07f06f59232500d38f15ee6dd35d9a7b5bff3ce0 100644
--- a/libraries/technology/ip_arria10/fifo/hdllib.cfg
+++ b/libraries/technology/ip_arria10/fifo/hdllib.cfg
@@ -17,3 +17,10 @@ test_bench_files =
[quartus_project_file]
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_fifo_sc.qsys
+ ip_arria10_fifo_dc.qsys
+ ip_arria10_fifo_dc_mixed_widths.qsys
+
diff --git a/libraries/technology/ip_arria10/flash/asmi_parallel/hdllib.cfg b/libraries/technology/ip_arria10/flash/asmi_parallel/hdllib.cfg
index b07ad14a4324b1cbef7ab1545e532684aeada43a..fada8c8e4770a5349fdf9420106e5d545013c74d 100644
--- a/libraries/technology/ip_arria10/flash/asmi_parallel/hdllib.cfg
+++ b/libraries/technology/ip_arria10/flash/asmi_parallel/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_asmi_parallel.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_asmi_parallel.qsys
+
diff --git a/libraries/technology/ip_arria10/flash/remote_update/hdllib.cfg b/libraries/technology/ip_arria10/flash/remote_update/hdllib.cfg
index 732cd7b07254de1a80b48bb44ba54b6b1935db5b..464e3bdf685dbac3ff33fbab550e8e57b0e99e46 100644
--- a/libraries/technology/ip_arria10/flash/remote_update/hdllib.cfg
+++ b/libraries/technology/ip_arria10/flash/remote_update/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_remote_update.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_remote_update.qsys
+
diff --git a/libraries/technology/ip_arria10/fractional_pll_clk125/hdllib.cfg b/libraries/technology/ip_arria10/fractional_pll_clk125/hdllib.cfg
index 825eb56fb47688051e777c31e1be53e319aa6cd7..71d929e9ed0838112dec25ae674a400dee033a2e 100644
--- a/libraries/technology/ip_arria10/fractional_pll_clk125/hdllib.cfg
+++ b/libraries/technology/ip_arria10/fractional_pll_clk125/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_fractional_pll_clk125.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_fractional_pll_clk125.qsys
+
diff --git a/libraries/technology/ip_arria10/fractional_pll_clk200/hdllib.cfg b/libraries/technology/ip_arria10/fractional_pll_clk200/hdllib.cfg
index 4b8ecae7488f796d9bddbd69806d7d185420c096..6b6b3cef3a03c45ce48331e26a1885e38240ee23 100644
--- a/libraries/technology/ip_arria10/fractional_pll_clk200/hdllib.cfg
+++ b/libraries/technology/ip_arria10/fractional_pll_clk200/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_fractional_pll_clk200.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_fractional_pll_clk200.qsys
+
diff --git a/libraries/technology/ip_arria10/mac_10g/hdllib.cfg b/libraries/technology/ip_arria10/mac_10g/hdllib.cfg
index fe9d8cfe4c8dd251033d72c7030f35d7a7f9c677..bd87b3444a62616a3a7658d5b9778262801a0927 100644
--- a/libraries/technology/ip_arria10/mac_10g/hdllib.cfg
+++ b/libraries/technology/ip_arria10/mac_10g/hdllib.cfg
@@ -20,3 +20,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_mac_10g.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_mac_10g.qsys
+
diff --git a/libraries/technology/ip_arria10/phy_10gbase_r/hdllib.cfg b/libraries/technology/ip_arria10/phy_10gbase_r/hdllib.cfg
index 1d90fe04e695499b479765ee256c5a1dc46834a9..b4fc8605ca16e4f92ee839784c3819bfd786f10c 100644
--- a/libraries/technology/ip_arria10/phy_10gbase_r/hdllib.cfg
+++ b/libraries/technology/ip_arria10/phy_10gbase_r/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_phy_10gbase_r.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_phy_10gbase_r.qsys
+
diff --git a/libraries/technology/ip_arria10/phy_10gbase_r_12/hdllib.cfg b/libraries/technology/ip_arria10/phy_10gbase_r_12/hdllib.cfg
index 52f291e04463be06a3d4fba30a8368462d11e82c..52866d708073a7ebe239797d043ad2ad746a26c5 100644
--- a/libraries/technology/ip_arria10/phy_10gbase_r_12/hdllib.cfg
+++ b/libraries/technology/ip_arria10/phy_10gbase_r_12/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_phy_10gbase_r_12.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_phy_10gbase_r_12.qsys
+
diff --git a/libraries/technology/ip_arria10/phy_10gbase_r_24/hdllib.cfg b/libraries/technology/ip_arria10/phy_10gbase_r_24/hdllib.cfg
index f203933b41feabc4462724aea3e576f8d05f8172..0c22bfef188eb257abad90e025ee076cd3ae43f5 100644
--- a/libraries/technology/ip_arria10/phy_10gbase_r_24/hdllib.cfg
+++ b/libraries/technology/ip_arria10/phy_10gbase_r_24/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_phy_10gbase_r_24.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_phy_10gbase_r_24.qsys
+
diff --git a/libraries/technology/ip_arria10/phy_10gbase_r_4/hdllib.cfg b/libraries/technology/ip_arria10/phy_10gbase_r_4/hdllib.cfg
index 84ed2d979e89683f862066ff9283bb11d2fa4584..9066174d786492eb41234e3a20b567788675f695 100644
--- a/libraries/technology/ip_arria10/phy_10gbase_r_4/hdllib.cfg
+++ b/libraries/technology/ip_arria10/phy_10gbase_r_4/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_phy_10gbase_r_4.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_phy_10gbase_r_4.qsys
+
diff --git a/libraries/technology/ip_arria10/phy_10gbase_r_48/hdllib.cfg b/libraries/technology/ip_arria10/phy_10gbase_r_48/hdllib.cfg
index 23b996d5d148241af2f163e9450d3dde27559e25..3372c4933b0ec4fe8b1816436344ef301630c4fd 100644
--- a/libraries/technology/ip_arria10/phy_10gbase_r_48/hdllib.cfg
+++ b/libraries/technology/ip_arria10/phy_10gbase_r_48/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_phy_10gbase_r_48.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_phy_10gbase_r_48.qsys
+
diff --git a/libraries/technology/ip_arria10/pll_clk125/hdllib.cfg b/libraries/technology/ip_arria10/pll_clk125/hdllib.cfg
index ba0c574b95aa6fe301befe681227a15e3f3e87cd..716dc236332a8674c7fa04695779f833b9f8da4e 100644
--- a/libraries/technology/ip_arria10/pll_clk125/hdllib.cfg
+++ b/libraries/technology/ip_arria10/pll_clk125/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_pll_clk125.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_pll_clk125.qsys
+
diff --git a/libraries/technology/ip_arria10/pll_clk200/hdllib.cfg b/libraries/technology/ip_arria10/pll_clk200/hdllib.cfg
index 876299925e1650ef6afee9903fdc0e4d54f26f5b..a2cceba6b3982372b58d8759635e927b3e7ef2eb 100644
--- a/libraries/technology/ip_arria10/pll_clk200/hdllib.cfg
+++ b/libraries/technology/ip_arria10/pll_clk200/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_pll_clk200.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_pll_clk200.qsys
+
diff --git a/libraries/technology/ip_arria10/pll_clk25/hdllib.cfg b/libraries/technology/ip_arria10/pll_clk25/hdllib.cfg
index 85ec82a965e60edac43dd86f760a307faffc72ab..9254e792929235d2fd918a8f29e26410f513acac 100644
--- a/libraries/technology/ip_arria10/pll_clk25/hdllib.cfg
+++ b/libraries/technology/ip_arria10/pll_clk25/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_pll_clk25.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_pll_clk25.qsys
+
diff --git a/libraries/technology/ip_arria10/pll_xgmii_mac_clocks/hdllib.cfg b/libraries/technology/ip_arria10/pll_xgmii_mac_clocks/hdllib.cfg
index 7fe81748c95ed17355f0fe553b1ea509d54c7452..e868b714afa0b520ed1745bdc02933bc475f2a3d 100644
--- a/libraries/technology/ip_arria10/pll_xgmii_mac_clocks/hdllib.cfg
+++ b/libraries/technology/ip_arria10/pll_xgmii_mac_clocks/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_pll_xgmii_mac_clocks.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_pll_xgmii_mac_clocks.qsys
+
diff --git a/libraries/technology/ip_arria10/ram/hdllib.cfg b/libraries/technology/ip_arria10/ram/hdllib.cfg
index c9553187161f8d2cbccec309578d070827c40a0c..4b56555b04e99561fbff8bae9156e0c0ea16224b 100644
--- a/libraries/technology/ip_arria10/ram/hdllib.cfg
+++ b/libraries/technology/ip_arria10/ram/hdllib.cfg
@@ -22,3 +22,11 @@ test_bench_files =
[quartus_project_file]
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_ram_crwk_crw.qsys
+ ip_arria10_ram_crw_crw.qsys
+ ip_arria10_ram_cr_cw.qsys
+ ip_arria10_ram_r_w.qsys
+
diff --git a/libraries/technology/ip_arria10/temp_sense/hdllib.cfg b/libraries/technology/ip_arria10/temp_sense/hdllib.cfg
index 0d4162d734d3173cd98e1b9b9fbdafd04e4358ac..743b54a4f88c025ce6b8444137182ec573e67261 100644
--- a/libraries/technology/ip_arria10/temp_sense/hdllib.cfg
+++ b/libraries/technology/ip_arria10/temp_sense/hdllib.cfg
@@ -16,3 +16,8 @@ test_bench_files =
[quartus_project_file]
quartus_qip_files = generated/ip_arria10_temp_sense.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_temp_sense.qsys
+
diff --git a/libraries/technology/ip_arria10/transceiver_pll_10g/hdllib.cfg b/libraries/technology/ip_arria10/transceiver_pll_10g/hdllib.cfg
index 75dcfa5eca31bedbd576b633855b598cd41f8ea1..be5fa19d53e3a993f37fdb5c2a96423e5bcef3eb 100644
--- a/libraries/technology/ip_arria10/transceiver_pll_10g/hdllib.cfg
+++ b/libraries/technology/ip_arria10/transceiver_pll_10g/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_transceiver_pll_10g.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_transceiver_pll_10g.qsys
+
diff --git a/libraries/technology/ip_arria10/transceiver_reset_controller_1/hdllib.cfg b/libraries/technology/ip_arria10/transceiver_reset_controller_1/hdllib.cfg
index 11f7683e31cf1614e911206328e297c91547a6b4..64be140c28c9f368ea90990d0d1ce26b4b53d8ed 100644
--- a/libraries/technology/ip_arria10/transceiver_reset_controller_1/hdllib.cfg
+++ b/libraries/technology/ip_arria10/transceiver_reset_controller_1/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_transceiver_reset_controller_1.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_transceiver_reset_controller_1.qsys
+
diff --git a/libraries/technology/ip_arria10/transceiver_reset_controller_12/hdllib.cfg b/libraries/technology/ip_arria10/transceiver_reset_controller_12/hdllib.cfg
index c6a5d3b797c1d4ee5d6983665f3c0d2ac4320d8f..f5aa17bd7710f634a05d28d17a47efdd356bf2ea 100644
--- a/libraries/technology/ip_arria10/transceiver_reset_controller_12/hdllib.cfg
+++ b/libraries/technology/ip_arria10/transceiver_reset_controller_12/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_transceiver_reset_controller_12.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_transceiver_reset_controller_12.qsys
+
diff --git a/libraries/technology/ip_arria10/transceiver_reset_controller_24/hdllib.cfg b/libraries/technology/ip_arria10/transceiver_reset_controller_24/hdllib.cfg
index 490fa6c30d7f318893efd48ee2e8a7e43d78c32d..f9d08597da5d9b0909157e2e4e86fa44d0406b2c 100644
--- a/libraries/technology/ip_arria10/transceiver_reset_controller_24/hdllib.cfg
+++ b/libraries/technology/ip_arria10/transceiver_reset_controller_24/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_transceiver_reset_controller_24.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_transceiver_reset_controller_24.qsys
+
diff --git a/libraries/technology/ip_arria10/transceiver_reset_controller_4/hdllib.cfg b/libraries/technology/ip_arria10/transceiver_reset_controller_4/hdllib.cfg
index d24b6726af1afc1e5a1633d7ac36b81f7714de97..7e5fb7f0d3f360fcd134b7e9a7d65554043129f1 100644
--- a/libraries/technology/ip_arria10/transceiver_reset_controller_4/hdllib.cfg
+++ b/libraries/technology/ip_arria10/transceiver_reset_controller_4/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_transceiver_reset_controller_4.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_transceiver_reset_controller_4.qsys
+
diff --git a/libraries/technology/ip_arria10/transceiver_reset_controller_48/hdllib.cfg b/libraries/technology/ip_arria10/transceiver_reset_controller_48/hdllib.cfg
index 58e0413fd08b143c8ac39c727ee9ff9d90680c34..a519b5da8e54582821d1650ec965a7f868bf1e8c 100644
--- a/libraries/technology/ip_arria10/transceiver_reset_controller_48/hdllib.cfg
+++ b/libraries/technology/ip_arria10/transceiver_reset_controller_48/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_transceiver_reset_controller_48.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_transceiver_reset_controller_48.qsys
+
diff --git a/libraries/technology/ip_arria10/tse_sgmii_gx/hdllib.cfg b/libraries/technology/ip_arria10/tse_sgmii_gx/hdllib.cfg
index 26d59ecf13f191248414d36b5235f63d8bd8b19e..76550d695f72411c7d03f86fe8545706026b5289 100644
--- a/libraries/technology/ip_arria10/tse_sgmii_gx/hdllib.cfg
+++ b/libraries/technology/ip_arria10/tse_sgmii_gx/hdllib.cfg
@@ -18,3 +18,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_tse_sgmii_gx.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_tse_sgmii_gx.qsys
+
diff --git a/libraries/technology/ip_arria10/tse_sgmii_lvds/hdllib.cfg b/libraries/technology/ip_arria10/tse_sgmii_lvds/hdllib.cfg
index 694b6c70f6bb42b69dbb875b219768ec5b516972..f840e7826f40f94faec2e6e460df37b1920e9416 100644
--- a/libraries/technology/ip_arria10/tse_sgmii_lvds/hdllib.cfg
+++ b/libraries/technology/ip_arria10/tse_sgmii_lvds/hdllib.cfg
@@ -19,3 +19,8 @@ modelsim_compile_ip_files =
quartus_qip_files =
generated/ip_arria10_tse_sgmii_lvds.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_tse_sgmii_lvds.qsys
+
diff --git a/libraries/technology/ip_arria10/voltage_sense/hdllib.cfg b/libraries/technology/ip_arria10/voltage_sense/hdllib.cfg
index a2e3ec5155bb6187b3401ee0ca4293a9be493c10..72730345ecd9e56704f92012704fe397e732117a 100644
--- a/libraries/technology/ip_arria10/voltage_sense/hdllib.cfg
+++ b/libraries/technology/ip_arria10/voltage_sense/hdllib.cfg
@@ -17,3 +17,8 @@ test_bench_files =
[quartus_project_file]
quartus_qip_files = generated/ip_arria10_voltage_sense.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_voltage_sense.qsys
+
diff --git a/libraries/technology/ip_arria10_e1sg/clkbuf_global/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/clkbuf_global/hdllib.cfg
index 7504ddb609095a635a3e274e61666650c114d86b..23561d752071b65f3ee9b3be0dbcc25130ac5fab 100644
--- a/libraries/technology/ip_arria10_e1sg/clkbuf_global/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/clkbuf_global/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_e1sg_clkbuf_global.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e1sg_clkbuf_global.qsys
+
diff --git a/libraries/technology/ip_arria10_e1sg/complex_mult/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/complex_mult/hdllib.cfg
index 02a6d4874a9af44692b4b4064fbf137d3b7edad5..90d4a43e520e391def0c724a8c92c2d8c0d7951c 100644
--- a/libraries/technology/ip_arria10_e1sg/complex_mult/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/complex_mult/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_e1sg_complex_mult.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e1sg_complex_mult.qsys
+
diff --git a/libraries/technology/ip_arria10_e1sg/ddio/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/ddio/hdllib.cfg
index 8fd1e669ff70035761e455a49515b99f12090a03..4b67f37fb858dbf912e4655ab5396f1be7fe655a 100644
--- a/libraries/technology/ip_arria10_e1sg/ddio/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/ddio/hdllib.cfg
@@ -20,3 +20,9 @@ modelsim_compile_ip_files =
quartus_qip_files =
generated/ip_arria10_e1sg_ddio_in_1.qip
generated/ip_arria10_e1sg_ddio_out_1.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e1sg_ddio_in_1.qsys
+ ip_arria10_e1sg_ddio_out_1.qsys
+
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_4g_1600/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/ddr4_4g_1600/hdllib.cfg
index 9fa46dcfabe4b7b411bb72de9ca52ed5ce26442f..b85f1affbdb1876d9ff4355204bef73b75d5349a 100644
--- a/libraries/technology/ip_arria10_e1sg/ddr4_4g_1600/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_4g_1600/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_e1sg_ddr4_4g_1600.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e1sg_ddr4_4g_1600.qsys
+
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_4g_2000/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/ddr4_4g_2000/hdllib.cfg
index 695d6e9a6bbab055030e239cdb86c0cdfd6cbb98..df3280dd879754c16d14531adf128d6674b531ea 100644
--- a/libraries/technology/ip_arria10_e1sg/ddr4_4g_2000/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_4g_2000/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_e1sg_ddr4_4g_2000.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e1sg_ddr4_4g_2000.qsys
+
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_8g_1600/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/ddr4_8g_1600/hdllib.cfg
index fb991b3967d5bee811dddb40fa9790de4d3a0027..8ae4f5fe243d4612288d670965728830b738200b 100644
--- a/libraries/technology/ip_arria10_e1sg/ddr4_8g_1600/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_8g_1600/hdllib.cfg
@@ -18,3 +18,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_e1sg_ddr4_8g_1600.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e1sg_ddr4_8g_1600.qsys
+
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/hdllib.cfg
index ceea1ea066f44fa63e53beb23e4aa1ff422861c7..1e627f46a21f1759c72680ee63cc5b7e172cad42 100644
--- a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_e1sg_ddr4_8g_2400.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e1sg_ddr4_8g_2400.qsys
+
diff --git a/libraries/technology/ip_arria10_e1sg/fifo/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/fifo/hdllib.cfg
index 6bbc027dd8f4d49807a564e0050d5d985311cb8a..a44f90faa8b124a84355693565c3ee7c318e6ddd 100644
--- a/libraries/technology/ip_arria10_e1sg/fifo/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/fifo/hdllib.cfg
@@ -17,3 +17,10 @@ test_bench_files =
[quartus_project_file]
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e1sg_fifo_sc.qsys
+ ip_arria10_e1sg_fifo_dc.qsys
+ ip_arria10_e1sg_fifo_dc_mixed_widths.qsys
+
diff --git a/libraries/technology/ip_arria10_e1sg/flash/asmi_parallel/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/flash/asmi_parallel/hdllib.cfg
index 05b50ddd820c1737d1237f11378db09c3b1bbde1..57592865243035ef21910667c1c5a059bbcd874c 100644
--- a/libraries/technology/ip_arria10_e1sg/flash/asmi_parallel/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/flash/asmi_parallel/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_e1sg_asmi_parallel.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e1sg_asmi_parallel.qsys
+
diff --git a/libraries/technology/ip_arria10_e1sg/flash/remote_update/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/flash/remote_update/hdllib.cfg
index 9db01d2cbd95e589a4edb096f087b3ffc4a94bed..d976bfc1df93f70e8e8740b0fa636f931e0c71a1 100644
--- a/libraries/technology/ip_arria10_e1sg/flash/remote_update/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/flash/remote_update/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_e1sg_remote_update.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e1sg_remote_update.qsys
+
diff --git a/libraries/technology/ip_arria10_e1sg/fractional_pll_clk125/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/fractional_pll_clk125/hdllib.cfg
index f4a814161ae8e110335d88ce71d6208e5fb0c53e..0c531649bf16e22d1564301fc1bb9cc361e5ed28 100644
--- a/libraries/technology/ip_arria10_e1sg/fractional_pll_clk125/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/fractional_pll_clk125/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_e1sg_fractional_pll_clk125.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e1sg_fractional_pll_clk125.qsys
+
diff --git a/libraries/technology/ip_arria10_e1sg/fractional_pll_clk200/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/fractional_pll_clk200/hdllib.cfg
index 1a6b0a376b32e2a898640aaba1ea4f37c93e08ee..abb39ab8e350e355ad4e8612872d0f3758366a90 100644
--- a/libraries/technology/ip_arria10_e1sg/fractional_pll_clk200/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/fractional_pll_clk200/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_e1sg_fractional_pll_clk200.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e1sg_fractional_pll_clk200.qsys
+
diff --git a/libraries/technology/ip_arria10_e1sg/mac_10g/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/mac_10g/hdllib.cfg
index 8b45746380e7bc10ae6ad8dfb0f03d77d696826f..cd1823f27a3101cd150df1cfa10fa9540f529aad 100644
--- a/libraries/technology/ip_arria10_e1sg/mac_10g/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/mac_10g/hdllib.cfg
@@ -20,3 +20,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_e1sg_mac_10g.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e1sg_mac_10g.qsys
+
diff --git a/libraries/technology/ip_arria10_e1sg/mult_add4/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/mult_add4/hdllib.cfg
index 762c5bdef325fd0924bf91a9cb663c25904da25d..a08133a9e1477a700b9fcd17cb49e80ea9a0a5de 100644
--- a/libraries/technology/ip_arria10_e1sg/mult_add4/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/mult_add4/hdllib.cfg
@@ -14,3 +14,8 @@ test_bench_files =
[quartus_project_file]
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e1sg_mult_add4.qsys
+
diff --git a/libraries/technology/ip_arria10_e1sg/phy_10gbase_r/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/phy_10gbase_r/hdllib.cfg
index d35beb3b4e341f4087c33d13a039065d9b7c3653..0741afe10990b675f457234bfb35519e716cb587 100644
--- a/libraries/technology/ip_arria10_e1sg/phy_10gbase_r/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/phy_10gbase_r/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_e1sg_phy_10gbase_r.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e1sg_phy_10gbase_r.qsys
+
diff --git a/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_12/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_12/hdllib.cfg
index 29adb1d9b8eefdeb8afea27c7368e7ca549909c4..a96e9f38fadfedb8d60b432e25fc84c7d34080ee 100644
--- a/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_12/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_12/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_e1sg_phy_10gbase_r_12.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e1sg_phy_10gbase_r_12.qsys
+
diff --git a/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_24/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_24/hdllib.cfg
index 4bd7fc021eea05eea60792374ce599e010085d56..73089d379c30f71fd23c61dca3ed5135854b64ea 100644
--- a/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_24/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_24/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_e1sg_phy_10gbase_r_24.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e1sg_phy_10gbase_r_24.qsys
+
diff --git a/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_4/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_4/hdllib.cfg
index 89b33cab67aacfbdf8e111757c92a81e73d0c0bd..d9b2caffc6a54d4a5bcb448ad93f047b96f83f74 100644
--- a/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_4/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_4/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_e1sg_phy_10gbase_r_4.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e1sg_phy_10gbase_r_4.qsys
+
diff --git a/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_48/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_48/hdllib.cfg
index 8876a23c016ff0027bd6c96ea119d3d75ebb353d..2f81d5c56dbe0862b844630e85902e6abd84cf45 100644
--- a/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_48/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_48/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_e1sg_phy_10gbase_r_48.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e1sg_phy_10gbase_r_48.qsys
+
diff --git a/libraries/technology/ip_arria10_e1sg/pll_clk125/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/pll_clk125/hdllib.cfg
index 5d46c79cf04af9d5d04df963796743071750834e..fba621f4ccb96a74e5ced7db43d9c50263dbe854 100644
--- a/libraries/technology/ip_arria10_e1sg/pll_clk125/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/pll_clk125/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_e1sg_pll_clk125.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e1sg_pll_clk125.qsys
+
diff --git a/libraries/technology/ip_arria10_e1sg/pll_clk200/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/pll_clk200/hdllib.cfg
index f931e6073894f649df6d50aa49ec26a7a591f91b..64f374ea39f1d5ec3aabdbd9360cfba04c310a75 100644
--- a/libraries/technology/ip_arria10_e1sg/pll_clk200/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/pll_clk200/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_e1sg_pll_clk200.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e1sg_pll_clk200.qsys
+
diff --git a/libraries/technology/ip_arria10_e1sg/pll_clk25/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/pll_clk25/hdllib.cfg
index 776f7257d61e053f5340b0990167fbf9a7e555e8..0b0445e87b2ff5f2202f93ac82f3c48f6c8eca4f 100644
--- a/libraries/technology/ip_arria10_e1sg/pll_clk25/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/pll_clk25/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_e1sg_pll_clk25.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e1sg_pll_clk25.qsys
+
diff --git a/libraries/technology/ip_arria10_e1sg/pll_xgmii_mac_clocks/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/pll_xgmii_mac_clocks/hdllib.cfg
index 9bbc02a2ca36f93540b5e3b7fc02d44cb62e4535..828c1daaa8fbcead4bf6c25d633e8edc9db90d6b 100644
--- a/libraries/technology/ip_arria10_e1sg/pll_xgmii_mac_clocks/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/pll_xgmii_mac_clocks/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_e1sg_pll_xgmii_mac_clocks.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e1sg_pll_xgmii_mac_clocks.qsys
+
diff --git a/libraries/technology/ip_arria10_e1sg/ram/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/ram/hdllib.cfg
index 11a6f461518fbf997aadf12bf0b161adf4deaff5..84cf6b82163e82efbe0b3069721d1bb4c89dd9fb 100644
--- a/libraries/technology/ip_arria10_e1sg/ram/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/ram/hdllib.cfg
@@ -22,3 +22,11 @@ test_bench_files =
[quartus_project_file]
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e1sg_ram_crwk_crw.qsys
+ ip_arria10_e1sg_ram_crw_crw.qsys
+ ip_arria10_e1sg_ram_cr_cw.qsys
+ ip_arria10_e1sg_ram_r_w.qsys
+
diff --git a/libraries/technology/ip_arria10_e1sg/temp_sense/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/temp_sense/hdllib.cfg
index 0d72950c53b8664e732e2c98cfc51d03b050a4fe..802957ffeefe10914044399f0742f83e5e767301 100644
--- a/libraries/technology/ip_arria10_e1sg/temp_sense/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/temp_sense/hdllib.cfg
@@ -16,3 +16,8 @@ test_bench_files =
[quartus_project_file]
quartus_qip_files = generated/ip_arria10_e1sg_temp_sense.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e1sg_temp_sense.qsys
+
diff --git a/libraries/technology/ip_arria10_e1sg/transceiver_pll_10g/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/transceiver_pll_10g/hdllib.cfg
index 08c2ac709b765d656dc5c22ac2216b3c076b9dc7..2ccd57aa2c0d67fb5a1b94f06e03ed5daea62a4a 100644
--- a/libraries/technology/ip_arria10_e1sg/transceiver_pll_10g/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/transceiver_pll_10g/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_e1sg_transceiver_pll_10g.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e1sg_transceiver_pll_10g.qsys
+
diff --git a/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_1/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_1/hdllib.cfg
index 66e3ff86ed3378ae4ff903e631db714a3aa8aa31..c166e3b4b0002da5ece546138585fd3fb8fdd7c5 100644
--- a/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_1/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_1/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_e1sg_transceiver_reset_controller_1.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e1sg_transceiver_reset_controller_1.qsys
+
diff --git a/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_12/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_12/hdllib.cfg
index 23934188a7e0054ef7766c5cd75e33537d33d493..47ed49c37efa813f5a8c25b72ef2ac60aa063bc1 100644
--- a/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_12/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_12/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_e1sg_transceiver_reset_controller_12.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e1sg_transceiver_reset_controller_12.qsys
+
diff --git a/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_24/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_24/hdllib.cfg
index f71b8b1bd41fec38f2395b501671cbdc8c05936e..6db05582224d25fb73246e95a9b2c66739359cc3 100644
--- a/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_24/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_24/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_e1sg_transceiver_reset_controller_24.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e1sg_transceiver_reset_controller_24.qsys
+
diff --git a/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_4/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_4/hdllib.cfg
index 49ae9060620a7154e8bfdb07c852894a82f07a2d..43c1644820c9375aed2bf41a456c1a2844f09bcc 100644
--- a/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_4/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_4/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_e1sg_transceiver_reset_controller_4.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e1sg_transceiver_reset_controller_4.qsys
+
diff --git a/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_48/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_48/hdllib.cfg
index 51f03a221a31aef8fe7d2aaa8e01326309efb83a..a886607f470d84aeed515f2be78ccbccf2e4aa69 100644
--- a/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_48/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_48/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_e1sg_transceiver_reset_controller_48.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e1sg_transceiver_reset_controller_48.qsys
+
diff --git a/libraries/technology/ip_arria10_e1sg/tse_sgmii_gx/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/tse_sgmii_gx/hdllib.cfg
index abfacc5cb9919dff5d1600e74e7a7f91afc24bbc..b0c2a4a1407aa1365ca5be745f6d9b4374d342d1 100644
--- a/libraries/technology/ip_arria10_e1sg/tse_sgmii_gx/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/tse_sgmii_gx/hdllib.cfg
@@ -18,3 +18,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_e1sg_tse_sgmii_gx.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e1sg_tse_sgmii_gx.qsys
+
diff --git a/libraries/technology/ip_arria10_e1sg/tse_sgmii_lvds/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/tse_sgmii_lvds/hdllib.cfg
index 9a67954387c5e62aa380fa9b364a1497ee71ed75..148454de1b68b42bb2e02a0fcb3f865566fa5390 100644
--- a/libraries/technology/ip_arria10_e1sg/tse_sgmii_lvds/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/tse_sgmii_lvds/hdllib.cfg
@@ -20,3 +20,8 @@ modelsim_compile_ip_files =
quartus_qip_files =
generated/ip_arria10_e1sg_tse_sgmii_lvds.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e1sg_tse_sgmii_lvds.qsys
+
diff --git a/libraries/technology/ip_arria10_e1sg/voltage_sense/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/voltage_sense/hdllib.cfg
index 58a16e411907b12618b1216d8a6606e51277dd84..e1c54d182ac915d2be9e5b2039852883d8a06cb2 100644
--- a/libraries/technology/ip_arria10_e1sg/voltage_sense/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/voltage_sense/hdllib.cfg
@@ -17,3 +17,8 @@ test_bench_files =
[quartus_project_file]
quartus_qip_files = generated/ip_arria10_e1sg_voltage_sense.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e1sg_voltage_sense.qsys
+
diff --git a/libraries/technology/ip_arria10_e3sge3/clkbuf_global/hdllib.cfg b/libraries/technology/ip_arria10_e3sge3/clkbuf_global/hdllib.cfg
index 0c279c174911401301a0bfd1c4768e6b075f2234..66d47d1ae30c2ee355111b4bec569c5a9625eef2 100644
--- a/libraries/technology/ip_arria10_e3sge3/clkbuf_global/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e3sge3/clkbuf_global/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_e3sge3_clkbuf_global.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e3sge3_clkbuf_global.qsys
+
diff --git a/libraries/technology/ip_arria10_e3sge3/complex_mult/hdllib.cfg b/libraries/technology/ip_arria10_e3sge3/complex_mult/hdllib.cfg
index 66eec3257070738ba46d5abcdbbb995ad876357b..28ead31eedbea2ad2a508de5fc900db275c578b8 100644
--- a/libraries/technology/ip_arria10_e3sge3/complex_mult/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e3sge3/complex_mult/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_e3sge3_complex_mult.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e3sge3_complex_mult.qsys
+
diff --git a/libraries/technology/ip_arria10_e3sge3/ddio/hdllib.cfg b/libraries/technology/ip_arria10_e3sge3/ddio/hdllib.cfg
index ffdcf8e0d817bb8c49b35e432ab61e266bf30bbc..d053102ed70097bc9fb20a72fa3c22aeb06938ec 100644
--- a/libraries/technology/ip_arria10_e3sge3/ddio/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e3sge3/ddio/hdllib.cfg
@@ -20,3 +20,9 @@ modelsim_compile_ip_files =
quartus_qip_files =
generated/ip_arria10_e3sge3_ddio_in_1.qip
generated/ip_arria10_e3sge3_ddio_out_1.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e3sge3_ddio_in_1.qsys
+ ip_arria10_e3sge3_ddio_out_1.qsys
+
diff --git a/libraries/technology/ip_arria10_e3sge3/ddr4_4g_1600/hdllib.cfg b/libraries/technology/ip_arria10_e3sge3/ddr4_4g_1600/hdllib.cfg
index 7de6d9cc7e0179aafb4ec67fcbb4b97726e6152b..20a085ab6473103e6ee3f9a3078f5c2695a518d3 100644
--- a/libraries/technology/ip_arria10_e3sge3/ddr4_4g_1600/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e3sge3/ddr4_4g_1600/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_e3sge3_ddr4_4g_1600.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e3sge3_ddr4_4g_1600.qsys
+
diff --git a/libraries/technology/ip_arria10_e3sge3/ddr4_4g_2000/hdllib.cfg b/libraries/technology/ip_arria10_e3sge3/ddr4_4g_2000/hdllib.cfg
index 5b8927482ca8d909c73fcea6e3feb20b99f864e5..c23aafef03b22c62fc2f272aa04920e709d12375 100644
--- a/libraries/technology/ip_arria10_e3sge3/ddr4_4g_2000/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e3sge3/ddr4_4g_2000/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_e3sge3_ddr4_4g_2000.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e3sge3_ddr4_4g_2000.qsys
+
diff --git a/libraries/technology/ip_arria10_e3sge3/ddr4_8g_1600/hdllib.cfg b/libraries/technology/ip_arria10_e3sge3/ddr4_8g_1600/hdllib.cfg
index a90e81ff44e7ce2967b99494e6f3a539d133aea2..29715012a363b91cc0228f63a2c20e9b82a9fee3 100644
--- a/libraries/technology/ip_arria10_e3sge3/ddr4_8g_1600/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e3sge3/ddr4_8g_1600/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_e3sge3_ddr4_8g_1600.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e3sge3_ddr4_8g_1600.qsys
+
diff --git a/libraries/technology/ip_arria10_e3sge3/ddr4_8g_2400/hdllib.cfg b/libraries/technology/ip_arria10_e3sge3/ddr4_8g_2400/hdllib.cfg
index 91a0f974724f1e569fab5418fe25729c6d389109..a433ee55229367e93046d038914594c6e1db47cc 100644
--- a/libraries/technology/ip_arria10_e3sge3/ddr4_8g_2400/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e3sge3/ddr4_8g_2400/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_e3sge3_ddr4_8g_2400.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e3sge3_ddr4_8g_2400.qsys
+
diff --git a/libraries/technology/ip_arria10_e3sge3/fifo/hdllib.cfg b/libraries/technology/ip_arria10_e3sge3/fifo/hdllib.cfg
index 779ccfcef22b9018a7f4de064fbeb7fd66f93d43..feab22041eedbd570ccc7f6aae19434b5467a857 100644
--- a/libraries/technology/ip_arria10_e3sge3/fifo/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e3sge3/fifo/hdllib.cfg
@@ -17,3 +17,10 @@ test_bench_files =
[quartus_project_file]
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e3sge3_fifo_sc.qsys
+ ip_arria10_e3sge3_fifo_dc.qsys
+ ip_arria10_e3sge3_fifo_dc_mixed_widths.qsys
+
diff --git a/libraries/technology/ip_arria10_e3sge3/flash/asmi_parallel/hdllib.cfg b/libraries/technology/ip_arria10_e3sge3/flash/asmi_parallel/hdllib.cfg
index 0ceeddd60a3a5ce3fbe390ef542356e38eed62c3..08a9862f736d5b73b9bcb103c314ec74fdfe3b61 100644
--- a/libraries/technology/ip_arria10_e3sge3/flash/asmi_parallel/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e3sge3/flash/asmi_parallel/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_e3sge3_asmi_parallel.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e3sge3_asmi_parallel.qsys
+
diff --git a/libraries/technology/ip_arria10_e3sge3/flash/remote_update/hdllib.cfg b/libraries/technology/ip_arria10_e3sge3/flash/remote_update/hdllib.cfg
index 4bf49a5928f6c6b1fc81466478081f83e2379ea1..ee60d547c8ee724cfd40c6ff81e45e9c56c31785 100644
--- a/libraries/technology/ip_arria10_e3sge3/flash/remote_update/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e3sge3/flash/remote_update/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_e3sge3_remote_update.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e3sge3_remote_update.qsys
+
diff --git a/libraries/technology/ip_arria10_e3sge3/fractional_pll_clk125/hdllib.cfg b/libraries/technology/ip_arria10_e3sge3/fractional_pll_clk125/hdllib.cfg
index 86e2ac2c1a13334fa0119bea0e6af2d16a4ee6ff..70f593d6bb33201bcb9b307b81a2d105c10e861c 100644
--- a/libraries/technology/ip_arria10_e3sge3/fractional_pll_clk125/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e3sge3/fractional_pll_clk125/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_e3sge3_fractional_pll_clk125.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e3sge3_fractional_pll_clk125.qsys
+
diff --git a/libraries/technology/ip_arria10_e3sge3/fractional_pll_clk200/hdllib.cfg b/libraries/technology/ip_arria10_e3sge3/fractional_pll_clk200/hdllib.cfg
index dc5a2ead34d552e0321031b8d4afb5a4fe72502d..f150a9eff002da8700bdfb6d62a68fba50253b49 100644
--- a/libraries/technology/ip_arria10_e3sge3/fractional_pll_clk200/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e3sge3/fractional_pll_clk200/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_e3sge3_fractional_pll_clk200.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e3sge3_fractional_pll_clk200.qsys
+
diff --git a/libraries/technology/ip_arria10_e3sge3/mac_10g/hdllib.cfg b/libraries/technology/ip_arria10_e3sge3/mac_10g/hdllib.cfg
index 98c627b440a5e8bf0d4b0d247742c8855b411d95..9d03c8de482d5b21f5a4fe529f2af1da913b9fd1 100644
--- a/libraries/technology/ip_arria10_e3sge3/mac_10g/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e3sge3/mac_10g/hdllib.cfg
@@ -20,3 +20,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_e3sge3_mac_10g.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e3sge3_mac_10g.qsys
+
diff --git a/libraries/technology/ip_arria10_e3sge3/mult_add4/hdllib.cfg b/libraries/technology/ip_arria10_e3sge3/mult_add4/hdllib.cfg
index ca89bcac69209ddeef668bb99986780436b1beaf..49f1f40515f5a7694040bad997e3752958321ca0 100644
--- a/libraries/technology/ip_arria10_e3sge3/mult_add4/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e3sge3/mult_add4/hdllib.cfg
@@ -14,3 +14,8 @@ test_bench_files =
[quartus_project_file]
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e3sge3_mult_add4.qsys
+
diff --git a/libraries/technology/ip_arria10_e3sge3/phy_10gbase_r/hdllib.cfg b/libraries/technology/ip_arria10_e3sge3/phy_10gbase_r/hdllib.cfg
index ef62134daee68f36cf6a2daf9b07e8aa6e283feb..d6999a29ee2f93b40c8121ec6289a4ac187eca66 100644
--- a/libraries/technology/ip_arria10_e3sge3/phy_10gbase_r/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e3sge3/phy_10gbase_r/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_e3sge3_phy_10gbase_r.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e3sge3_phy_10gbase_r.qsys
+
diff --git a/libraries/technology/ip_arria10_e3sge3/phy_10gbase_r_12/hdllib.cfg b/libraries/technology/ip_arria10_e3sge3/phy_10gbase_r_12/hdllib.cfg
index 7f282e184137f6a810e2a24aefae92dbadced41a..2c483639f50437a0fc82fd8a07b646b503f2dea4 100644
--- a/libraries/technology/ip_arria10_e3sge3/phy_10gbase_r_12/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e3sge3/phy_10gbase_r_12/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_e3sge3_phy_10gbase_r_12.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e3sge3_phy_10gbase_r_12.qsys
+
diff --git a/libraries/technology/ip_arria10_e3sge3/phy_10gbase_r_24/hdllib.cfg b/libraries/technology/ip_arria10_e3sge3/phy_10gbase_r_24/hdllib.cfg
index c71586e6376d9ed53b0104636067c50b4ab010cd..5c2b3e6e59e1cbedc0254dbc5aa9ce8e8f279ece 100644
--- a/libraries/technology/ip_arria10_e3sge3/phy_10gbase_r_24/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e3sge3/phy_10gbase_r_24/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_e3sge3_phy_10gbase_r_24.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e3sge3_phy_10gbase_r_24.qsys
+
diff --git a/libraries/technology/ip_arria10_e3sge3/phy_10gbase_r_4/hdllib.cfg b/libraries/technology/ip_arria10_e3sge3/phy_10gbase_r_4/hdllib.cfg
index fa9eb5787592eb9663bde46397998372eb0e3140..94e1849d1e32b336c35566ddb8f1e585797aa397 100644
--- a/libraries/technology/ip_arria10_e3sge3/phy_10gbase_r_4/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e3sge3/phy_10gbase_r_4/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_e3sge3_phy_10gbase_r_4.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e3sge3_phy_10gbase_r_4.qsys
+
diff --git a/libraries/technology/ip_arria10_e3sge3/phy_10gbase_r_48/hdllib.cfg b/libraries/technology/ip_arria10_e3sge3/phy_10gbase_r_48/hdllib.cfg
index a9a4f25f2a6b46e437526ad61ca5a3e47aedf7cf..4ea8a12229e27255a30f43118748bd6ef32046d5 100644
--- a/libraries/technology/ip_arria10_e3sge3/phy_10gbase_r_48/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e3sge3/phy_10gbase_r_48/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_e3sge3_phy_10gbase_r_48.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e3sge3_phy_10gbase_r_48.qsys
+
diff --git a/libraries/technology/ip_arria10_e3sge3/pll_clk125/hdllib.cfg b/libraries/technology/ip_arria10_e3sge3/pll_clk125/hdllib.cfg
index 4744956c3432b434afc01abbf188c49b25183791..3e61b19f5b9bc8bd25a4731dd4ad711c011b1571 100644
--- a/libraries/technology/ip_arria10_e3sge3/pll_clk125/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e3sge3/pll_clk125/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_e3sge3_pll_clk125.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e3sge3_pll_clk125.qsys
+
diff --git a/libraries/technology/ip_arria10_e3sge3/pll_clk200/hdllib.cfg b/libraries/technology/ip_arria10_e3sge3/pll_clk200/hdllib.cfg
index bbf989101b933c210fd222a522ce201d19c4462a..736f98fb0c7765508bb8db5d7ceec21b9fc7cd04 100644
--- a/libraries/technology/ip_arria10_e3sge3/pll_clk200/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e3sge3/pll_clk200/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_e3sge3_pll_clk200.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e3sge3_pll_clk200.qsys
+
diff --git a/libraries/technology/ip_arria10_e3sge3/pll_clk25/hdllib.cfg b/libraries/technology/ip_arria10_e3sge3/pll_clk25/hdllib.cfg
index faa801825150ed079cc169ab3b3db08499e694d9..7ddd6210a78df3cebc1aac249f385c683716fdba 100644
--- a/libraries/technology/ip_arria10_e3sge3/pll_clk25/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e3sge3/pll_clk25/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_e3sge3_pll_clk25.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e3sge3_pll_clk25.qsys
+
diff --git a/libraries/technology/ip_arria10_e3sge3/pll_xgmii_mac_clocks/hdllib.cfg b/libraries/technology/ip_arria10_e3sge3/pll_xgmii_mac_clocks/hdllib.cfg
index 8ffd2a8b646883647ffd52b457e85edc3a8d0e26..3241762cfd9cb8b7cf86b59add598533721719fe 100644
--- a/libraries/technology/ip_arria10_e3sge3/pll_xgmii_mac_clocks/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e3sge3/pll_xgmii_mac_clocks/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_e3sge3_pll_xgmii_mac_clocks.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e3sge3_pll_xgmii_mac_clocks.qsys
+
diff --git a/libraries/technology/ip_arria10_e3sge3/ram/hdllib.cfg b/libraries/technology/ip_arria10_e3sge3/ram/hdllib.cfg
index 993b503c63d7488a3ad2222fd688611549eba9c0..5042710d8ba9d7110580747d4c24d29fcd1a3d19 100644
--- a/libraries/technology/ip_arria10_e3sge3/ram/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e3sge3/ram/hdllib.cfg
@@ -22,3 +22,11 @@ test_bench_files =
[quartus_project_file]
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e3sge3_ram_crwk_crw.qsys
+ ip_arria10_e3sge3_ram_crw_crw.qsys
+ ip_arria10_e3sge3_ram_cr_cw.qsys
+ ip_arria10_e3sge3_ram_r_w.qsys
+
diff --git a/libraries/technology/ip_arria10_e3sge3/temp_sense/hdllib.cfg b/libraries/technology/ip_arria10_e3sge3/temp_sense/hdllib.cfg
index eb2f3106631be81fef06ff3b6cbd18ae64eb6520..04b2dc9836efa1f208d5371f9043ec2c30fb5b72 100644
--- a/libraries/technology/ip_arria10_e3sge3/temp_sense/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e3sge3/temp_sense/hdllib.cfg
@@ -16,3 +16,8 @@ test_bench_files =
[quartus_project_file]
quartus_qip_files = generated/ip_arria10_e3sge3_temp_sense.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e3sge3_temp_sense.qsys
+
diff --git a/libraries/technology/ip_arria10_e3sge3/transceiver_pll_10g/hdllib.cfg b/libraries/technology/ip_arria10_e3sge3/transceiver_pll_10g/hdllib.cfg
index 351187d2433986c0d6a25fa443f6b481331dba9f..d1284863953e02f1f65270d4ffed68df0dd23635 100644
--- a/libraries/technology/ip_arria10_e3sge3/transceiver_pll_10g/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e3sge3/transceiver_pll_10g/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_e3sge3_transceiver_pll_10g.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e3sge3_transceiver_pll_10g.qsys
+
diff --git a/libraries/technology/ip_arria10_e3sge3/transceiver_reset_controller_1/hdllib.cfg b/libraries/technology/ip_arria10_e3sge3/transceiver_reset_controller_1/hdllib.cfg
index fd0ff98f514ec0bc741f9f368275b58596c4d54e..df77648d5bb6d8132dee32ad2a312c87414fdb6f 100644
--- a/libraries/technology/ip_arria10_e3sge3/transceiver_reset_controller_1/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e3sge3/transceiver_reset_controller_1/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_e3sge3_transceiver_reset_controller_1.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e3sge3_transceiver_reset_controller_1.qsys
+
diff --git a/libraries/technology/ip_arria10_e3sge3/transceiver_reset_controller_12/hdllib.cfg b/libraries/technology/ip_arria10_e3sge3/transceiver_reset_controller_12/hdllib.cfg
index 6d8544bec1c6d68b05e0315c3e8fda780d2882b8..1174e7891aeed310bbf978f057b4c252d5ef2e2f 100644
--- a/libraries/technology/ip_arria10_e3sge3/transceiver_reset_controller_12/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e3sge3/transceiver_reset_controller_12/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_e3sge3_transceiver_reset_controller_12.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e3sge3_transceiver_reset_controller_12.qsys
+
diff --git a/libraries/technology/ip_arria10_e3sge3/transceiver_reset_controller_24/hdllib.cfg b/libraries/technology/ip_arria10_e3sge3/transceiver_reset_controller_24/hdllib.cfg
index 3104cabeda2fe6ac2cfc27a53bab1460f07a0185..5568315590566a9718b13f2afa17e1618d654c95 100644
--- a/libraries/technology/ip_arria10_e3sge3/transceiver_reset_controller_24/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e3sge3/transceiver_reset_controller_24/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_e3sge3_transceiver_reset_controller_24.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e3sge3_transceiver_reset_controller_24.qsys
+
diff --git a/libraries/technology/ip_arria10_e3sge3/transceiver_reset_controller_4/hdllib.cfg b/libraries/technology/ip_arria10_e3sge3/transceiver_reset_controller_4/hdllib.cfg
index 4c9fed66989dd30d67ed93545ce49129e2d06811..e5bb6bb856506f7660514dd1be97c0f3eca88902 100644
--- a/libraries/technology/ip_arria10_e3sge3/transceiver_reset_controller_4/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e3sge3/transceiver_reset_controller_4/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_e3sge3_transceiver_reset_controller_4.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e3sge3_transceiver_reset_controller_4.qsys
+
diff --git a/libraries/technology/ip_arria10_e3sge3/transceiver_reset_controller_48/hdllib.cfg b/libraries/technology/ip_arria10_e3sge3/transceiver_reset_controller_48/hdllib.cfg
index 86b474c736f4de53ca79b5e28598dcee241346a8..9185b8febc88ed705f7a89b14ab060f0aae69d0f 100644
--- a/libraries/technology/ip_arria10_e3sge3/transceiver_reset_controller_48/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e3sge3/transceiver_reset_controller_48/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_e3sge3_transceiver_reset_controller_48.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e3sge3_transceiver_reset_controller_48.qsys
+
diff --git a/libraries/technology/ip_arria10_e3sge3/tse_sgmii_gx/hdllib.cfg b/libraries/technology/ip_arria10_e3sge3/tse_sgmii_gx/hdllib.cfg
index df60de6e51120144fddd74709380a81255bc7b10..a2022287b220b345ba688fd62324feb3aa31c829 100644
--- a/libraries/technology/ip_arria10_e3sge3/tse_sgmii_gx/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e3sge3/tse_sgmii_gx/hdllib.cfg
@@ -18,3 +18,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_arria10_e3sge3_tse_sgmii_gx.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e3sge3_tse_sgmii_gx.qsys
+
diff --git a/libraries/technology/ip_arria10_e3sge3/tse_sgmii_lvds/hdllib.cfg b/libraries/technology/ip_arria10_e3sge3/tse_sgmii_lvds/hdllib.cfg
index 8c175111ce2c16a43d76069b66236a22313b06c6..5665f5db4c74986adf0c56baf99b9339eb683702 100644
--- a/libraries/technology/ip_arria10_e3sge3/tse_sgmii_lvds/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e3sge3/tse_sgmii_lvds/hdllib.cfg
@@ -19,3 +19,8 @@ modelsim_compile_ip_files =
quartus_qip_files =
generated/ip_arria10_e3sge3_tse_sgmii_lvds.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e3sge3_tse_sgmii_lvds.qsys
+
diff --git a/libraries/technology/ip_arria10_e3sge3/voltage_sense/hdllib.cfg b/libraries/technology/ip_arria10_e3sge3/voltage_sense/hdllib.cfg
index b6529dfd36030ce4450c21ddd912fc14a2a7f76d..63946dd01ba8563fc43797c620922c0abe33699d 100644
--- a/libraries/technology/ip_arria10_e3sge3/voltage_sense/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e3sge3/voltage_sense/hdllib.cfg
@@ -17,3 +17,8 @@ test_bench_files =
[quartus_project_file]
quartus_qip_files = generated/ip_arria10_e3sge3_voltage_sense.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e3sge3_voltage_sense.qsys
+
diff --git a/libraries/technology/ip_stratixiv/ddr3_mem_model/hdllib.cfg b/libraries/technology/ip_stratixiv/ddr3_mem_model/hdllib.cfg
index 6e6d7706b892126442ef6e24b458aa3dc9049c46..be91a1fd6bff36be876433d57cf04ae609fb0cc8 100644
--- a/libraries/technology/ip_stratixiv/ddr3_mem_model/hdllib.cfg
+++ b/libraries/technology/ip_stratixiv/ddr3_mem_model/hdllib.cfg
@@ -15,3 +15,14 @@ modelsim_compile_ip_files =
[quartus_project_file]
+
+
+[generate_ip_libs]
+qmegawiz_ip_files =
+ ip_stratixiv_ddr3_uphy_4g_800_master.v
+quartus_sh_ip_files =
+ generate_sim_vhdl_example_design.tcl
+quartus_sh_ip_srcdir =
+ ../qmegawiz/ip_stratixiv_ddr3_uphy_4g_800_master_example_design/simulation
+
+#cd ../ddr3_uphy_4g_800_master/generated/ip_stratixiv_ddr3_uphy_4g_800_master_example_design/simulation
diff --git a/libraries/technology/ip_stratixiv/ddr3_uphy_16g_dual_rank_800/hdllib.cfg b/libraries/technology/ip_stratixiv/ddr3_uphy_16g_dual_rank_800/hdllib.cfg
index 1b5ee24b7e77456a62aad36f587c6d73d7ff5124..31f0359c75c3ec00538cfc8352f3cfd3f6ec236a 100644
--- a/libraries/technology/ip_stratixiv/ddr3_uphy_16g_dual_rank_800/hdllib.cfg
+++ b/libraries/technology/ip_stratixiv/ddr3_uphy_16g_dual_rank_800/hdllib.cfg
@@ -18,3 +18,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_stratixiv_ddr3_uphy_16g_dual_rank_800.qip
+
+[generate_ip_libs]
+qmegawiz_ip_files =
+ ip_stratixiv_ddr3_uphy_16g_dual_rank_800.v
+
diff --git a/libraries/technology/ip_stratixiv/ddr3_uphy_4g_800_master/hdllib.cfg b/libraries/technology/ip_stratixiv/ddr3_uphy_4g_800_master/hdllib.cfg
index 9644bb62bc05603811c733df9efbc37c864a7172..0d39d81f1fea4fdf7b275f493514a74b2354f48f 100644
--- a/libraries/technology/ip_stratixiv/ddr3_uphy_4g_800_master/hdllib.cfg
+++ b/libraries/technology/ip_stratixiv/ddr3_uphy_4g_800_master/hdllib.cfg
@@ -18,3 +18,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_stratixiv_ddr3_uphy_4g_800_master.qip
+
+[generate_ip_libs]
+qmegawiz_ip_files =
+ ip_stratixiv_ddr3_uphy_4g_800_master.v
+
diff --git a/libraries/technology/ip_stratixiv/ddr3_uphy_4g_800_slave/hdllib.cfg b/libraries/technology/ip_stratixiv/ddr3_uphy_4g_800_slave/hdllib.cfg
index f56145e6a6b4752dc528da4f03e740469a7d1bb3..46a856b9a0d6eac4c536d4e611c77062cbaab7f0 100644
--- a/libraries/technology/ip_stratixiv/ddr3_uphy_4g_800_slave/hdllib.cfg
+++ b/libraries/technology/ip_stratixiv/ddr3_uphy_4g_800_slave/hdllib.cfg
@@ -17,3 +17,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_stratixiv_ddr3_uphy_4g_800_slave.qip
+
+[generate_ip_libs]
+qmegawiz_ip_files =
+ ip_stratixiv_ddr3_uphy_4g_800_slave.v
+
diff --git a/libraries/technology/ip_stratixiv/ddr3_uphy_4g_single_rank_800_master/hdllib.cfg b/libraries/technology/ip_stratixiv/ddr3_uphy_4g_single_rank_800_master/hdllib.cfg
index 1f4f9200a4b878e8da4546ea4235dc48168b8024..c28bd93dd1b24022b08a27be593fb4c7e957d83d 100644
--- a/libraries/technology/ip_stratixiv/ddr3_uphy_4g_single_rank_800_master/hdllib.cfg
+++ b/libraries/technology/ip_stratixiv/ddr3_uphy_4g_single_rank_800_master/hdllib.cfg
@@ -18,3 +18,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_stratixiv_ddr3_uphy_4g_single_rank_800_master.qip
+
+[generate_ip_libs]
+qmegawiz_ip_files =
+ ip_stratixiv_ddr3_uphy_4g_single_rank_800_master.v
+
diff --git a/libraries/technology/ip_stratixiv/ddr3_uphy_4g_single_rank_800_slave/hdllib.cfg b/libraries/technology/ip_stratixiv/ddr3_uphy_4g_single_rank_800_slave/hdllib.cfg
index bf801765f002cecc1000f0270982be57e991d06d..6f9285a23446bddeaef69b9d2bec8094a5976024 100644
--- a/libraries/technology/ip_stratixiv/ddr3_uphy_4g_single_rank_800_slave/hdllib.cfg
+++ b/libraries/technology/ip_stratixiv/ddr3_uphy_4g_single_rank_800_slave/hdllib.cfg
@@ -18,3 +18,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
generated/ip_stratixiv_ddr3_uphy_4g_single_rank_800_slave.qip
+
+[generate_ip_libs]
+qmegawiz_ip_files =
+ ip_stratixiv_ddr3_uphy_4g_single_rank_800_slave.v
+
diff --git a/libraries/technology/ip_stratixiv/mac_10g/hdllib.cfg b/libraries/technology/ip_stratixiv/mac_10g/hdllib.cfg
index 0863274168b1f8edc4081bca40c4e18ac727d83c..da20f4a1a876d4bc4163a9785ed2536445834e46 100644
--- a/libraries/technology/ip_stratixiv/mac_10g/hdllib.cfg
+++ b/libraries/technology/ip_stratixiv/mac_10g/hdllib.cfg
@@ -26,3 +26,8 @@ quartus_sdc_files =
quartus_qip_files =
generated/ip_stratixiv_mac_10g.qip
+
+[generate_ip_libs]
+qmegawiz_ip_files =
+ ip_stratixiv_mac_10g.vhd
+
diff --git a/libraries/technology/ip_stratixiv/phy_xaui/generated/ip_stratixiv_phy_xaui_0_sim/ip_stratixiv_phy_xaui_0.vhd b/libraries/technology/ip_stratixiv/phy_xaui/generated/ip_stratixiv_phy_xaui_0_sim/ip_stratixiv_phy_xaui_0.vhd
index f0bda1c332ec47b7d22ed49ff0896942e0044d65..6eaa8362bf161097119d8b4dc517e5d294e94a40 100644
--- a/libraries/technology/ip_stratixiv/phy_xaui/generated/ip_stratixiv_phy_xaui_0_sim/ip_stratixiv_phy_xaui_0.vhd
+++ b/libraries/technology/ip_stratixiv/phy_xaui/generated/ip_stratixiv_phy_xaui_0_sim/ip_stratixiv_phy_xaui_0.vhd
@@ -1,6 +1,6 @@
-- ip_stratixiv_phy_xaui_0.vhd
--- Generated using ACDS version 11.1sp2 259 at 2016.05.17.15:40:35
+-- Generated using ACDS version 11.1sp2 259 at 2019.09.24.11:22:17
library IEEE;
use IEEE.std_logic_1164.all;
diff --git a/libraries/technology/ip_stratixiv/phy_xaui/generated/ip_stratixiv_phy_xaui_0_sim/mentor/msim_setup.tcl b/libraries/technology/ip_stratixiv/phy_xaui/generated/ip_stratixiv_phy_xaui_0_sim/mentor/msim_setup.tcl
index 60168352309689d35362392fbc0b76d29d125dab..05cf8ec7e27407e6e98072a65882135decb64fc8 100644
--- a/libraries/technology/ip_stratixiv/phy_xaui/generated/ip_stratixiv_phy_xaui_0_sim/mentor/msim_setup.tcl
+++ b/libraries/technology/ip_stratixiv/phy_xaui/generated/ip_stratixiv_phy_xaui_0_sim/mentor/msim_setup.tcl
@@ -1,5 +1,5 @@
-# (C) 2001-2016 Altera Corporation. All rights reserved.
+# (C) 2001-2019 Altera Corporation. All rights reserved.
# Your use of Altera Corporation's design tools, logic functions and
# other software and tools, and its AMPP partner logic functions, and
# any output files any of the foregoing (including device programming
diff --git a/libraries/technology/ip_stratixiv/phy_xaui/generated/ip_stratixiv_phy_xaui_soft_sim/ip_stratixiv_phy_xaui_soft.vhd b/libraries/technology/ip_stratixiv/phy_xaui/generated/ip_stratixiv_phy_xaui_soft_sim/ip_stratixiv_phy_xaui_soft.vhd
index f9ee88a0be2b47a87a64c80bfb8a6e3118ff5fa7..ba85a5ee9eb847100742a886cded96fe39b9e757 100644
--- a/libraries/technology/ip_stratixiv/phy_xaui/generated/ip_stratixiv_phy_xaui_soft_sim/ip_stratixiv_phy_xaui_soft.vhd
+++ b/libraries/technology/ip_stratixiv/phy_xaui/generated/ip_stratixiv_phy_xaui_soft_sim/ip_stratixiv_phy_xaui_soft.vhd
@@ -1,6 +1,6 @@
-- ip_stratixiv_phy_xaui_soft.vhd
--- Generated using ACDS version 11.1sp2 259 at 2016.05.17.15:41:14
+-- Generated using ACDS version 11.1sp2 259 at 2019.09.24.11:22:44
library IEEE;
use IEEE.std_logic_1164.all;
diff --git a/libraries/technology/ip_stratixiv/phy_xaui/generated/ip_stratixiv_phy_xaui_soft_sim/mentor/msim_setup.tcl b/libraries/technology/ip_stratixiv/phy_xaui/generated/ip_stratixiv_phy_xaui_soft_sim/mentor/msim_setup.tcl
index 2d65d2485fcad863158ebf147c6776ef82384d54..047e62db290e8fdaeb35944cf2f727e750cbe193 100644
--- a/libraries/technology/ip_stratixiv/phy_xaui/generated/ip_stratixiv_phy_xaui_soft_sim/mentor/msim_setup.tcl
+++ b/libraries/technology/ip_stratixiv/phy_xaui/generated/ip_stratixiv_phy_xaui_soft_sim/mentor/msim_setup.tcl
@@ -1,5 +1,5 @@
-# (C) 2001-2016 Altera Corporation. All rights reserved.
+# (C) 2001-2019 Altera Corporation. All rights reserved.
# Your use of Altera Corporation's design tools, logic functions and
# other software and tools, and its AMPP partner logic functions, and
# any output files any of the foregoing (including device programming
diff --git a/libraries/technology/ip_stratixiv/phy_xaui/hdllib.cfg b/libraries/technology/ip_stratixiv/phy_xaui/hdllib.cfg
index 260a93b452bef74ecbdba6591c49e8fb53500bcc..8f8916bf66ba204b654a727c13413980d0ac0b62 100644
--- a/libraries/technology/ip_stratixiv/phy_xaui/hdllib.cfg
+++ b/libraries/technology/ip_stratixiv/phy_xaui/hdllib.cfg
@@ -34,4 +34,12 @@ quartus_sdc_files =
quartus_qip_files =
generated/ip_stratixiv_phy_xaui_0.qip
- ip_stratixiv_phy_xaui_soft.qip
\ No newline at end of file
+ ip_stratixiv_phy_xaui_soft.qip
+
+[generate_ip_libs]
+qmegawiz_ip_files =
+ ip_stratixiv_phy_xaui_0.vhd
+ ip_stratixiv_phy_xaui_1.vhd
+ ip_stratixiv_phy_xaui_2.vhd
+ ip_stratixiv_phy_xaui_soft.vhd
+