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Commit 2deef738 authored by Pepping's avatar Pepping
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Removal

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<?xml version="1.0" encoding="UTF-8"?>
<filters version="11.1sp2" />
<?xml version="1.0" encoding="UTF-8"?>
<preferences>
<debug showDebugMenu="0" />
<systemtable filter="Default">
<columns>
<connections preferredWidth="63" />
<irq preferredWidth="34" />
</columns>
</systemtable>
<clocktable>
<columns>
<clockname preferredWidth="324" />
<clocksource preferredWidth="323" />
<frequency preferredWidth="304" />
</columns>
</clocktable>
<library expandedCategories="Library,Project,Library/Uniboard" />
<window width="1262" height="1079" x="0" y="0" />
<hdlexample language="VHDL" />
<generation simulation="VHDL" testbench_system="NONE" />
</preferences>
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