Commits · fbadd894d7d9827a69728028dc87b3f3dcfa28db · RTSD / HDL · GitLab

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Jun 26, 2015
- Use separate g_dp_wr_fifo_depth and g_dp_rd_fifo_depth. · fbadd894
  Eric Kooistra authored 9 years ago
  
  fbadd894
- Derive g_rd_fifo_af_margin internally in io_ddr.vhd based on g_tech_ddr.name=DDR3 or DDR4. · 12fd53ea
  Eric Kooistra authored 9 years ago
  
  12fd53ea
Jun 25, 2015
- Removed dvr_clk, because it is the mm_clk. Fixed use g_cross_domain_dvr_ctlr =... · 755f1acb
  Eric Kooistra authored 9 years ago
  755f1acb
Jun 12, 2015
- Added g_sim_model. · 33e83b5a
  Eric Kooistra authored 9 years ago
  
  33e83b5a
- Provide streaming access to IO_DDR using a Tx seq and a Rx seq with optional DB RAM. · 61f16974
  Eric Kooistra authored 9 years ago
  
  61f16974
Jun 11, 2015
- Added draft src/vhdl/mms_io_ddr_diag.vhd, it intstantiates the BG, DB and... · 4e1d928d
  Eric Kooistra authored 9 years ago
  4e1d928d