Set default input port value for reg_io_ddr_mosi, to allow leaving it not connected.

libraries/io/ddr3/src/vhdl/ddr3_transpose.vhd

@@ -58,7 +58,7 @@ ENTITY ddr3_transpose IS
     dp_out_rst            : OUT STD_LOGIC;  
     
     -- MM register map for DDR controller status info
-    reg_io_ddr_mosi       : IN    t_mem_mosi;
+    reg_io_ddr_mosi       : IN    t_mem_mosi := c_mem_mosi_rst;
     reg_io_ddr_miso       : OUT   t_mem_miso;
                           
     -- ST sinks