From ff80a6aba1387cb00c0caee06738de4f765e1ed9 Mon Sep 17 00:00:00 2001 From: Erik Kooistra <kooistra@astron.nl> Date: Fri, 10 Apr 2015 09:53:54 +0000 Subject: [PATCH] Set default input port value for reg_io_ddr_mosi, to allow leaving it not connected. --- libraries/io/ddr3/src/vhdl/ddr3_transpose.vhd | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/libraries/io/ddr3/src/vhdl/ddr3_transpose.vhd b/libraries/io/ddr3/src/vhdl/ddr3_transpose.vhd index 5a4bb55dd9..5ce12b7faa 100644 --- a/libraries/io/ddr3/src/vhdl/ddr3_transpose.vhd +++ b/libraries/io/ddr3/src/vhdl/ddr3_transpose.vhd @@ -58,7 +58,7 @@ ENTITY ddr3_transpose IS dp_out_rst : OUT STD_LOGIC; -- MM register map for DDR controller status info - reg_io_ddr_mosi : IN t_mem_mosi; + reg_io_ddr_mosi : IN t_mem_mosi := c_mem_mosi_rst; reg_io_ddr_miso : OUT t_mem_miso; -- ST sinks -- GitLab