-Using the *full* (including MSbit) range of FIFO used words to trigger FIFO

 readout. As the MSbit was missing, usedw would wrap from 127 to 0 (instead
 of indicating 128) which caused the FIFO to no longer be read out and
 overflowing under cetain circumstances (gaps in the data = no valid signal
 to trigger FIFO readout while the adder+fifo registers still output 4
 valid words after fifo src_in.ready goining down).