added compile_ip.tcl files and edited hdllib.cfg to change the quartus

version number from 151 to 170

libraries/technology/ip_arria10_e1sg/pll_xgmii_mac_clocks/compile_ip.tcl

+#------------------------------------------------------------------------------
+#
+# Copyright (C) 2017
+# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
+# JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>
+# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+#
+#------------------------------------------------------------------------------
+
+# This file is based on generated file mentor/msim_setup.tcl.
+# - the values for modelsim_search_libraries key in the hdllib.cfg follow from altera libraries vmap section in the msim_setup.tcl
+# - vmap for the IP specific libraries and compile all IP source files into those libraries similar as in the msim_setup.tcl
+# - replace QSYS_SIMDIR by IP_DIR
+# - if the testbench is also generated with QSYS then only the IP_TBDIR files are needed, because these also contain the source files.
+
+#vlib ./work/         ;# Assume library work already exist                                                                                        
+
+
+set IP_DIR   "$env(RADIOHDL)/libraries/technology/ip_arria10_e1sg/pll_xgmii_mac_clocks/generated/sim"
+
+vmap  ip_arria10_e1sg_pll_xgmii_mac_clocks ./work/
+vmap  altera_xcvr_fpll_a10_170             ./work/
+
+
+  vlog -sv  "$IP_DIR/../altera_xcvr_fpll_a10_170/sim/twentynm_xcvr_avmm.sv"                 -work altera_xcvr_fpll_a10_170            
+  vlog -sv  "$IP_DIR/../altera_xcvr_fpll_a10_170/sim/mentor/twentynm_xcvr_avmm.sv"          -work altera_xcvr_fpll_a10_170            
+  vlog -sv  "$IP_DIR/../altera_xcvr_fpll_a10_170/sim/alt_xcvr_resync.sv"                    -work altera_xcvr_fpll_a10_170            
+  vlog -sv  "$IP_DIR/../altera_xcvr_fpll_a10_170/sim/mentor/alt_xcvr_resync.sv"             -work altera_xcvr_fpll_a10_170            
+  vlog -sv  "$IP_DIR/../altera_xcvr_fpll_a10_170/sim/altera_xcvr_fpll_a10.sv"               -work altera_xcvr_fpll_a10_170            
+  vlog -sv  "$IP_DIR/../altera_xcvr_fpll_a10_170/sim/mentor/altera_xcvr_fpll_a10.sv"        -work altera_xcvr_fpll_a10_170            
+  vlog -sv  "$IP_DIR/../altera_xcvr_fpll_a10_170/sim/a10_avmm_h.sv"                         -work altera_xcvr_fpll_a10_170            
+  vlog -sv  "$IP_DIR/../altera_xcvr_fpll_a10_170/sim/alt_xcvr_native_avmm_nf.sv"            -work altera_xcvr_fpll_a10_170            
+  vlog -sv  "$IP_DIR/../altera_xcvr_fpll_a10_170/sim/alt_xcvr_pll_embedded_debug.sv"        -work altera_xcvr_fpll_a10_170            
+  vlog -sv  "$IP_DIR/../altera_xcvr_fpll_a10_170/sim/alt_xcvr_pll_avmm_csr.sv"              -work altera_xcvr_fpll_a10_170            
+  vlog -sv  "$IP_DIR/../altera_xcvr_fpll_a10_170/sim/mentor/alt_xcvr_pll_embedded_debug.sv" -work altera_xcvr_fpll_a10_170            
+  vlog -sv  "$IP_DIR/../altera_xcvr_fpll_a10_170/sim/mentor/alt_xcvr_pll_avmm_csr.sv"       -work altera_xcvr_fpll_a10_170            
+  vcom         "$IP_DIR/ip_arria10_e1sg_pll_xgmii_mac_clocks.vhd"                              -work ip_arria10_e1sg_pll_xgmii_mac_clocks

libraries/technology/ip_arria10_e1sg/pll_xgmii_mac_clocks/hdllib.cfg

 hdl_lib_name = ip_arria10_e1sg_pll_xgmii_mac_clocks  
-hdl_library_clause_name = ip_arria10_e1sg_pll_xgmii_mac_clocks_altera_xcvr_fpll_a10_151
+hdl_library_clause_name = ip_arria10_e1sg_pll_xgmii_mac_clocks_altera_xcvr_fpll_a10_170
 hdl_lib_uses_synth = 
 hdl_lib_uses_sim = 
 hdl_lib_technology = ip_arria10_e1sg

libraries/technology/ip_arria10_e1sg/ram/compile_ip.tcl

+#------------------------------------------------------------------------------
+#
+# Copyright (C) 2017
+# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
+# JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>
+# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+#
+#------------------------------------------------------------------------------
+
+# This file is based on generated file mentor/msim_setup.tcl.
+# - the values for modelsim_search_libraries key in the hdllib.cfg follow from altera libraries vmap section in the msim_setup.tcl
+# - vmap for the IP specific libraries and compile all IP source files into those libraries similar as in the msim_setup.tcl
+# - replace QSYS_SIMDIR by IP_DIR
+# - if the testbench is also generated with QSYS then only the IP_TBDIR files are needed, because these also contain the source files.
+
+#vlib ./work/         ;# Assume library work already exist                                                                                        
+
+
+set IP_DIR   "$env(RADIOHDL)/libraries/technology/ip_arria10_e1sg/ram/generated/sim"
+
+vmap  ip_arria10_e1sg_ram_r_w ./work/
+vmap  ram_2port_170           ./work/
+
+
+  vcom  "$IP_DIR/../ram_2port_170/sim/ip_arria10_e1sg_ram_r_w_ram_2port_170_dddfrrq.vhd" -work ram_2port_170          
+  vcom  "$IP_DIR/ip_arria10_e1sg_ram_r_w.vhd"                                            -work ip_arria10_e1sg_ram_r_w

libraries/technology/ip_arria10_e1sg/temp_sense/compile_ip.tcl

+#------------------------------------------------------------------------------
+#
+# Copyright (C) 2017
+# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
+# JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>
+# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+#
+#------------------------------------------------------------------------------
+
+# This file is based on generated file mentor/msim_setup.tcl.
+# - the values for modelsim_search_libraries key in the hdllib.cfg follow from altera libraries vmap section in the msim_setup.tcl
+# - vmap for the IP specific libraries and compile all IP source files into those libraries similar as in the msim_setup.tcl
+# - replace QSYS_SIMDIR by IP_DIR
+# - if the testbench is also generated with QSYS then only the IP_TBDIR files are needed, because these also contain the source files.
+
+#vlib ./work/         ;# Assume library work already exist                                                                                        
+
+
+set IP_DIR   "$env(RADIOHDL)/libraries/technology/ip_arria10_e1sg/temp_sense/generated/sim"
+
+vmap  altera_temp_sense_170      ./work/
+vmap  ip_arria10_e1sg_temp_sense ./work/
+
+
+  vlog  "$IP_DIR/../altera_temp_sense_170/sim/altera_temp_sense.v" -work altera_temp_sense_170     
+  vcom     "$IP_DIR/ip_arria10_e1sg_temp_sense.vhd"                   -work ip_arria10_e1sg_temp_sense

libraries/technology/ip_arria10_e1sg/temp_sense/hdllib.cfg

 hdl_lib_name = ip_arria10_e1sg_temp_sense 
-hdl_library_clause_name = ip_arria10_e1sg_temp_sense_altera_temp_sense_151
+hdl_library_clause_name = ip_arria10_e1sg_temp_sense_altera_temp_sense_170
 hdl_lib_uses_synth = 
 hdl_lib_uses_sim = 
 hdl_lib_technology = ip_arria10_e1sg

libraries/technology/ip_arria10_e1sg/transceiver_pll_10g/compile_ip.tcl

+#------------------------------------------------------------------------------
+#
+# Copyright (C) 2017
+# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
+# JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>
+# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+#
+#------------------------------------------------------------------------------
+
+# This file is based on generated file mentor/msim_setup.tcl.
+# - the values for modelsim_search_libraries key in the hdllib.cfg follow from altera libraries vmap section in the msim_setup.tcl
+# - vmap for the IP specific libraries and compile all IP source files into those libraries similar as in the msim_setup.tcl
+# - replace QSYS_SIMDIR by IP_DIR
+# - if the testbench is also generated with QSYS then only the IP_TBDIR files are needed, because these also contain the source files.
+
+#vlib ./work/         ;# Assume library work already exist                                                                                        
+
+
+set IP_DIR   "$env(RADIOHDL)/libraries/technology/ip_arria10_e1sg/transceiver_pll_10g/generated/sim"
+
+vmap  ip_arria10_e1sg_transceiver_pll_10g ./work/
+vmap  altera_common_sv_packages           ./work/
+vmap  altera_xcvr_atx_pll_a10_170         ./work/
+
+
+  vlog -sv  {"+incdir+$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/reconfig/"} "$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/altera_xcvr_native_a10_functions_h.sv"                                                                   -work altera_common_sv_packages          
+  vlog -sv  {"+incdir+$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/reconfig/"} "$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/twentynm_xcvr_avmm.sv"                                                      -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_170        
+  vlog -sv  {"+incdir+$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/reconfig/"} "$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/mentor/twentynm_xcvr_avmm.sv"                                               -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_170        
+  vlog -sv  {"+incdir+$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/reconfig/"} "$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/alt_xcvr_resync.sv"                                                         -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_170        
+  vlog -sv  {"+incdir+$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/reconfig/"} "$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/alt_xcvr_arbiter.sv"                                                        -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_170        
+  vlog -sv  {"+incdir+$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/reconfig/"} "$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/mentor/alt_xcvr_resync.sv"                                                  -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_170        
+  vlog -sv  {"+incdir+$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/reconfig/"} "$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/mentor/alt_xcvr_arbiter.sv"                                                 -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_170        
+  vlog -sv  {"+incdir+$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/reconfig/"} "$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/a10_avmm_h.sv"                                                              -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_170        
+  vlog -sv  {"+incdir+$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/reconfig/"} "$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/alt_xcvr_atx_pll_rcfg_arb.sv"                                               -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_170        
+  vlog -sv  {"+incdir+$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/reconfig/"} "$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/a10_xcvr_atx_pll.sv"                                                        -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_170        
+  vlog -sv  {"+incdir+$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/reconfig/"} "$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/alt_xcvr_pll_embedded_debug.sv"                                             -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_170        
+  vlog -sv  {"+incdir+$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/reconfig/"} "$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/alt_xcvr_pll_avmm_csr.sv"                                                   -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_170        
+  vlog -sv  {"+incdir+$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/reconfig/"} "$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/mentor/alt_xcvr_atx_pll_rcfg_arb.sv"                                        -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_170        
+  vlog -sv  {"+incdir+$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/reconfig/"} "$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/mentor/a10_xcvr_atx_pll.sv"                                                 -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_170        
+  vlog -sv  {"+incdir+$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/reconfig/"} "$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/mentor/alt_xcvr_pll_embedded_debug.sv"                                      -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_170        
+  vlog -sv  {"+incdir+$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/reconfig/"} "$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/mentor/alt_xcvr_pll_avmm_csr.sv"                                            -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_170        
+  vlog -sv  {"+incdir+$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/reconfig/"} "$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/ip_arria10_e1sg_transceiver_pll_10g_altera_xcvr_atx_pll_a10_170_3gt7q7a.sv" -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_170        
+  vlog -sv  {"+incdir+$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/reconfig/"} "$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/alt_xcvr_atx_pll_rcfg_opt_logic_3gt7q7a.sv"                                 -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_170        
+  vcom                                                                               "$IP_DIR/ip_arria10_e1sg_transceiver_pll_10g.vhd"                                                                                                    -work ip_arria10_e1sg_transceiver_pll_10g

libraries/technology/ip_arria10_e1sg/transceiver_pll_10g/hdllib.cfg

 hdl_lib_name = ip_arria10_e1sg_transceiver_pll_10g
-hdl_library_clause_name = ip_arria10_e1sg_transceiver_pll_10g_altera_xcvr_atx_pll_a10_151
+hdl_library_clause_name = ip_arria10_e1sg_transceiver_pll_10g_altera_xcvr_atx_pll_a10_170
 hdl_lib_uses_synth = 
 hdl_lib_uses_sim = 
 hdl_lib_technology = ip_arria10_e1sg

libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_1/compile_ip.tcl

+#------------------------------------------------------------------------------
+#
+# Copyright (C) 2017
+# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
+# JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>
+# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+#
+#------------------------------------------------------------------------------
+
+# This file is based on generated file mentor/msim_setup.tcl.
+# - the values for modelsim_search_libraries key in the hdllib.cfg follow from altera libraries vmap section in the msim_setup.tcl
+# - vmap for the IP specific libraries and compile all IP source files into those libraries similar as in the msim_setup.tcl
+# - replace QSYS_SIMDIR by IP_DIR
+# - if the testbench is also generated with QSYS then only the IP_TBDIR files are needed, because these also contain the source files.
+
+#vlib ./work/         ;# Assume library work already exist                                                                                        
+
+
+set IP_DIR   "$env(RADIOHDL)/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_1/generated/sim"
+
+vmap  ip_arria10_e1sg_transceiver_reset_controller_1 ./work/
+vmap  altera_xcvr_reset_control_170                  ./work/
+
+
+  vlog -sv  "$IP_DIR/../altera_xcvr_reset_control_170/sim/altera_xcvr_functions.sv"            -work altera_xcvr_reset_control_170                 
+  vlog -sv  "$IP_DIR/../altera_xcvr_reset_control_170/sim/mentor/altera_xcvr_functions.sv"     -work altera_xcvr_reset_control_170                 
+  vlog -sv  "$IP_DIR/../altera_xcvr_reset_control_170/sim/alt_xcvr_resync.sv"                  -work altera_xcvr_reset_control_170                 
+  vlog -sv  "$IP_DIR/../altera_xcvr_reset_control_170/sim/mentor/alt_xcvr_resync.sv"           -work altera_xcvr_reset_control_170                 
+  vlog -sv  "$IP_DIR/../altera_xcvr_reset_control_170/sim/altera_xcvr_reset_control.sv"        -work altera_xcvr_reset_control_170                 
+  vlog -sv  "$IP_DIR/../altera_xcvr_reset_control_170/sim/alt_xcvr_reset_counter.sv"           -work altera_xcvr_reset_control_170                 
+  vlog -sv  "$IP_DIR/../altera_xcvr_reset_control_170/sim/mentor/altera_xcvr_reset_control.sv" -work altera_xcvr_reset_control_170                 
+  vlog -sv  "$IP_DIR/../altera_xcvr_reset_control_170/sim/mentor/alt_xcvr_reset_counter.sv"    -work altera_xcvr_reset_control_170                 
+  vcom         "$IP_DIR/ip_arria10_e1sg_transceiver_reset_controller_1.vhd"                       -work ip_arria10_e1sg_transceiver_reset_controller_1

libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_1/hdllib.cfg

 hdl_lib_name = ip_arria10_e1sg_transceiver_reset_controller_1
-hdl_library_clause_name = ip_arria10_e1sg_transceiver_reset_controller_1_altera_xcvr_reset_control_151
+hdl_library_clause_name = ip_arria10_e1sg_transceiver_reset_controller_1_altera_xcvr_reset_control_170
 hdl_lib_uses_synth = 
 hdl_lib_uses_sim = 
 hdl_lib_technology = ip_arria10_e1sg

libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_12/compile_ip.tcl

+#------------------------------------------------------------------------------
+#
+# Copyright (C) 2017
+# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
+# JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>
+# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+#
+#------------------------------------------------------------------------------
+
+# This file is based on generated file mentor/msim_setup.tcl.
+# - the values for modelsim_search_libraries key in the hdllib.cfg follow from altera libraries vmap section in the msim_setup.tcl
+# - vmap for the IP specific libraries and compile all IP source files into those libraries similar as in the msim_setup.tcl
+# - replace QSYS_SIMDIR by IP_DIR
+# - if the testbench is also generated with QSYS then only the IP_TBDIR files are needed, because these also contain the source files.
+
+#vlib ./work/         ;# Assume library work already exist                                                                                        
+
+
+set IP_DIR   "$env(RADIOHDL)/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_12/generated/sim"
+
+vmap  altera_xcvr_reset_control_170                   ./work/
+vmap  ip_arria10_e1sg_transceiver_reset_controller_12 ./work/
+
+
+  vlog -sv  "$IP_DIR/../altera_xcvr_reset_control_170/sim/altera_xcvr_functions.sv"            -work altera_xcvr_reset_control_170                  
+  vlog -sv  "$IP_DIR/../altera_xcvr_reset_control_170/sim/mentor/altera_xcvr_functions.sv"     -work altera_xcvr_reset_control_170                  
+  vlog -sv  "$IP_DIR/../altera_xcvr_reset_control_170/sim/alt_xcvr_resync.sv"                  -work altera_xcvr_reset_control_170                  
+  vlog -sv  "$IP_DIR/../altera_xcvr_reset_control_170/sim/mentor/alt_xcvr_resync.sv"           -work altera_xcvr_reset_control_170                  
+  vlog -sv  "$IP_DIR/../altera_xcvr_reset_control_170/sim/altera_xcvr_reset_control.sv"        -work altera_xcvr_reset_control_170                  
+  vlog -sv  "$IP_DIR/../altera_xcvr_reset_control_170/sim/alt_xcvr_reset_counter.sv"           -work altera_xcvr_reset_control_170                  
+  vlog -sv  "$IP_DIR/../altera_xcvr_reset_control_170/sim/mentor/altera_xcvr_reset_control.sv" -work altera_xcvr_reset_control_170                  
+  vlog -sv  "$IP_DIR/../altera_xcvr_reset_control_170/sim/mentor/alt_xcvr_reset_counter.sv"    -work altera_xcvr_reset_control_170                  
+  vcom         "$IP_DIR/ip_arria10_e1sg_transceiver_reset_controller_12.vhd"                      -work ip_arria10_e1sg_transceiver_reset_controller_12

libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_12/hdllib.cfg

 hdl_lib_name = ip_arria10_e1sg_transceiver_reset_controller_12
-hdl_library_clause_name = ip_arria10_e1sg_transceiver_reset_controller_12_altera_xcvr_reset_control_151
+hdl_library_clause_name = ip_arria10_e1sg_transceiver_reset_controller_12_altera_xcvr_reset_control_170
 hdl_lib_uses_synth = 
 hdl_lib_uses_sim = 
 hdl_lib_technology = ip_arria10_e1sg

libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_24/compile_ip.tcl

+#------------------------------------------------------------------------------
+#
+# Copyright (C) 2017
+# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
+# JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>
+# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+#
+#------------------------------------------------------------------------------
+
+# This file is based on generated file mentor/msim_setup.tcl.
+# - the values for modelsim_search_libraries key in the hdllib.cfg follow from altera libraries vmap section in the msim_setup.tcl
+# - vmap for the IP specific libraries and compile all IP source files into those libraries similar as in the msim_setup.tcl
+# - replace QSYS_SIMDIR by IP_DIR
+# - if the testbench is also generated with QSYS then only the IP_TBDIR files are needed, because these also contain the source files.
+
+#vlib ./work/         ;# Assume library work already exist                                                                                        
+
+
+set IP_DIR   "$env(RADIOHDL)/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_24/generated/sim"
+
+vmap  altera_xcvr_reset_control_170                   ./work/
+vmap  ip_arria10_e1sg_transceiver_reset_controller_24 ./work/
+
+
+  vlog -sv  "$IP_DIR/../altera_xcvr_reset_control_170/sim/altera_xcvr_functions.sv"            -work altera_xcvr_reset_control_170                  
+  vlog -sv  "$IP_DIR/../altera_xcvr_reset_control_170/sim/mentor/altera_xcvr_functions.sv"     -work altera_xcvr_reset_control_170                  
+  vlog -sv  "$IP_DIR/../altera_xcvr_reset_control_170/sim/alt_xcvr_resync.sv"                  -work altera_xcvr_reset_control_170                  
+  vlog -sv  "$IP_DIR/../altera_xcvr_reset_control_170/sim/mentor/alt_xcvr_resync.sv"           -work altera_xcvr_reset_control_170                  
+  vlog -sv  "$IP_DIR/../altera_xcvr_reset_control_170/sim/altera_xcvr_reset_control.sv"        -work altera_xcvr_reset_control_170                  
+  vlog -sv  "$IP_DIR/../altera_xcvr_reset_control_170/sim/alt_xcvr_reset_counter.sv"           -work altera_xcvr_reset_control_170                  
+  vlog -sv  "$IP_DIR/../altera_xcvr_reset_control_170/sim/mentor/altera_xcvr_reset_control.sv" -work altera_xcvr_reset_control_170                  
+  vlog -sv  "$IP_DIR/../altera_xcvr_reset_control_170/sim/mentor/alt_xcvr_reset_counter.sv"    -work altera_xcvr_reset_control_170                  
+  vcom         "$IP_DIR/ip_arria10_e1sg_transceiver_reset_controller_24.vhd"                      -work ip_arria10_e1sg_transceiver_reset_controller_24

libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_24/hdllib.cfg

 hdl_lib_name = ip_arria10_e1sg_transceiver_reset_controller_24
-hdl_library_clause_name = ip_arria10_e1sg_transceiver_reset_controller_24_altera_xcvr_reset_control_151
+hdl_library_clause_name = ip_arria10_e1sg_transceiver_reset_controller_24_altera_xcvr_reset_control_170
 hdl_lib_uses_synth = 
 hdl_lib_uses_sim = 
 hdl_lib_technology = ip_arria10_e1sg

libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_4/compile_ip.tcl

+#------------------------------------------------------------------------------
+#
+# Copyright (C) 2017
+# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
+# JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>
+# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+#
+#------------------------------------------------------------------------------
+
+# This file is based on generated file mentor/msim_setup.tcl.
+# - the values for modelsim_search_libraries key in the hdllib.cfg follow from altera libraries vmap section in the msim_setup.tcl
+# - vmap for the IP specific libraries and compile all IP source files into those libraries similar as in the msim_setup.tcl
+# - replace QSYS_SIMDIR by IP_DIR
+# - if the testbench is also generated with QSYS then only the IP_TBDIR files are needed, because these also contain the source files.
+
+#vlib ./work/         ;# Assume library work already exist                                                                                        
+
+
+set IP_DIR   "$env(RADIOHDL)/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_4/generated/sim"
+
+vmap  ip_arria10_e1sg_transceiver_reset_controller_4 ./work/
+vmap  altera_xcvr_reset_control_170                  ./work/
+
+
+  vlog -sv  "$IP_DIR/../altera_xcvr_reset_control_170/sim/altera_xcvr_functions.sv"            -work altera_xcvr_reset_control_170                 
+  vlog -sv  "$IP_DIR/../altera_xcvr_reset_control_170/sim/mentor/altera_xcvr_functions.sv"     -work altera_xcvr_reset_control_170                 
+  vlog -sv  "$IP_DIR/../altera_xcvr_reset_control_170/sim/alt_xcvr_resync.sv"                  -work altera_xcvr_reset_control_170                 
+  vlog -sv  "$IP_DIR/../altera_xcvr_reset_control_170/sim/mentor/alt_xcvr_resync.sv"           -work altera_xcvr_reset_control_170                 
+  vlog -sv  "$IP_DIR/../altera_xcvr_reset_control_170/sim/altera_xcvr_reset_control.sv"        -work altera_xcvr_reset_control_170                 
+  vlog -sv  "$IP_DIR/../altera_xcvr_reset_control_170/sim/alt_xcvr_reset_counter.sv"           -work altera_xcvr_reset_control_170                 
+  vlog -sv  "$IP_DIR/../altera_xcvr_reset_control_170/sim/mentor/altera_xcvr_reset_control.sv" -work altera_xcvr_reset_control_170                 
+  vlog -sv  "$IP_DIR/../altera_xcvr_reset_control_170/sim/mentor/alt_xcvr_reset_counter.sv"    -work altera_xcvr_reset_control_170                 
+  vcom         "$IP_DIR/ip_arria10_e1sg_transceiver_reset_controller_4.vhd"                       -work ip_arria10_e1sg_transceiver_reset_controller_4

libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_4/hdllib.cfg

 hdl_lib_name = ip_arria10_e1sg_transceiver_reset_controller_4
-hdl_library_clause_name = ip_arria10_e1sg_transceiver_reset_controller_4_altera_xcvr_reset_control_151
+hdl_library_clause_name = ip_arria10_e1sg_transceiver_reset_controller_4_altera_xcvr_reset_control_170
 hdl_lib_uses_synth = 
 hdl_lib_uses_sim = 
 hdl_lib_technology = ip_arria10_e1sg

libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_48/compile_ip.tcl

+#------------------------------------------------------------------------------
+#
+# Copyright (C) 2017
+# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
+# JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>
+# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+#
+#------------------------------------------------------------------------------
+
+# This file is based on generated file mentor/msim_setup.tcl.
+# - the values for modelsim_search_libraries key in the hdllib.cfg follow from altera libraries vmap section in the msim_setup.tcl
+# - vmap for the IP specific libraries and compile all IP source files into those libraries similar as in the msim_setup.tcl
+# - replace QSYS_SIMDIR by IP_DIR
+# - if the testbench is also generated with QSYS then only the IP_TBDIR files are needed, because these also contain the source files.
+
+#vlib ./work/         ;# Assume library work already exist                                                                                        
+
+
+set IP_DIR   "$env(RADIOHDL)/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_48/generated/sim"
+
+vmap  altera_xcvr_reset_control_170                   ./work/
+vmap  ip_arria10_e1sg_transceiver_reset_controller_48 ./work/
+
+
+  vlog -sv  "$IP_DIR/../altera_xcvr_reset_control_170/sim/altera_xcvr_functions.sv"            -work altera_xcvr_reset_control_170                  
+  vlog -sv  "$IP_DIR/../altera_xcvr_reset_control_170/sim/mentor/altera_xcvr_functions.sv"     -work altera_xcvr_reset_control_170                  
+  vlog -sv  "$IP_DIR/../altera_xcvr_reset_control_170/sim/alt_xcvr_resync.sv"                  -work altera_xcvr_reset_control_170                  
+  vlog -sv  "$IP_DIR/../altera_xcvr_reset_control_170/sim/mentor/alt_xcvr_resync.sv"           -work altera_xcvr_reset_control_170                  
+  vlog -sv  "$IP_DIR/../altera_xcvr_reset_control_170/sim/altera_xcvr_reset_control.sv"        -work altera_xcvr_reset_control_170                  
+  vlog -sv  "$IP_DIR/../altera_xcvr_reset_control_170/sim/alt_xcvr_reset_counter.sv"           -work altera_xcvr_reset_control_170                  
+  vlog -sv  "$IP_DIR/../altera_xcvr_reset_control_170/sim/mentor/altera_xcvr_reset_control.sv" -work altera_xcvr_reset_control_170                  
+  vlog -sv  "$IP_DIR/../altera_xcvr_reset_control_170/sim/mentor/alt_xcvr_reset_counter.sv"    -work altera_xcvr_reset_control_170                  
+  vcom         "$IP_DIR/ip_arria10_e1sg_transceiver_reset_controller_48.vhd"                      -work ip_arria10_e1sg_transceiver_reset_controller_48

libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_48/hdllib.cfg

 hdl_lib_name = ip_arria10_e1sg_transceiver_reset_controller_48
-hdl_library_clause_name = ip_arria10_e1sg_transceiver_reset_controller_48_altera_xcvr_reset_control_151
+hdl_library_clause_name = ip_arria10_e1sg_transceiver_reset_controller_48_altera_xcvr_reset_control_170
 hdl_lib_uses_synth = 
 hdl_lib_uses_sim = 
 hdl_lib_technology = ip_arria10_e1sg

libraries/technology/ip_arria10_e1sg/tse_sgmii_gx/hdllib.cfg

 hdl_lib_name = ip_arria10_e1sg_tse_sgmii_gx
-hdl_library_clause_name = ip_arria10_e1sg_tse_sgmii_gx_altera_eth_tse_151
+hdl_library_clause_name = ip_arria10_e1sg_tse_sgmii_gx_altera_eth_tse_170
 hdl_lib_uses_synth = common
 hdl_lib_uses_sim = 
 hdl_lib_technology = ip_arria10_e1sg