added compile_ip.tcl files and edited hdllib.cfg to change the quartus

...ology/ip_arria10_e1sg/pll_xgmii_mac_clocks/compile_ip.tcl

...echnology/ip_arria10_e1sg/pll_xgmii_mac_clocks/hdllib.cfg

libraries/technology/ip_arria10_e1sg/ram/compile_ip.tcl

...ries/technology/ip_arria10_e1sg/temp_sense/compile_ip.tcl

libraries/technology/ip_arria10_e1sg/temp_sense/hdllib.cfg

...nology/ip_arria10_e1sg/transceiver_pll_10g/compile_ip.tcl

...technology/ip_arria10_e1sg/transceiver_pll_10g/hdllib.cfg

...rria10_e1sg/transceiver_reset_controller_1/compile_ip.tcl

...ip_arria10_e1sg/transceiver_reset_controller_1/hdllib.cfg

...ria10_e1sg/transceiver_reset_controller_12/compile_ip.tcl

...p_arria10_e1sg/transceiver_reset_controller_12/hdllib.cfg

...ria10_e1sg/transceiver_reset_controller_24/compile_ip.tcl

...p_arria10_e1sg/transceiver_reset_controller_24/hdllib.cfg

...rria10_e1sg/transceiver_reset_controller_4/compile_ip.tcl

...ip_arria10_e1sg/transceiver_reset_controller_4/hdllib.cfg

...ria10_e1sg/transceiver_reset_controller_48/compile_ip.tcl

...p_arria10_e1sg/transceiver_reset_controller_48/hdllib.cfg

...es/technology/ip_arria10_e1sg/tse_sgmii_gx/compile_ip.tcl

libraries/technology/ip_arria10_e1sg/tse_sgmii_gx/hdllib.cfg

.../technology/ip_arria10_e1sg/tse_sgmii_lvds/compile_ip.tcl