Updated arts_unb2b_sc3 such that it compiles in ModelSim.
. Completed data path from inputs to outputs through all stages. Updated arts_unb2b_sc3 such that it compiles in Quartus. . Commented out MMM due to QSYS IP issues . Added IP for 3-channel 10GbE base-R (all mods in technology dir) . Added g_direction generic to unb2b_board_10gbe in anticipation of having to split up the now duplex I/O to . the RX part in the input stage . the TX part in the output stage
Showing
- applications/arts/designs/arts_unb2b_sc3/hdllib.cfg 13 additions, 5 deletionsapplications/arts/designs/arts_unb2b_sc3/hdllib.cfg
- applications/arts/designs/arts_unb2b_sc3/src/vhdl/arts_unb2b_sc3.vhd 270 additions, 198 deletions...s/arts/designs/arts_unb2b_sc3/src/vhdl/arts_unb2b_sc3.vhd
- applications/arts/designs/arts_unb2b_sc3/src/vhdl/arts_unb2b_sc3_input.vhd 374 additions, 142 deletions.../designs/arts_unb2b_sc3/src/vhdl/arts_unb2b_sc3_input.vhd
- applications/arts/designs/arts_unb2b_sc3/src/vhdl/arts_unb2b_sc3_mm_master.vhd 4 additions, 1 deletion...igns/arts_unb2b_sc3/src/vhdl/arts_unb2b_sc3_mm_master.vhd
- applications/arts/designs/arts_unb2b_sc3/src/vhdl/arts_unb2b_sc3_output.vhd 182 additions, 17 deletions...designs/arts_unb2b_sc3/src/vhdl/arts_unb2b_sc3_output.vhd
- applications/arts/designs/arts_unb2b_sc3/src/vhdl/arts_unb2b_sc3_processing.vhd 65 additions, 24 deletions...gns/arts_unb2b_sc3/src/vhdl/arts_unb2b_sc3_processing.vhd
- boards/uniboard2b/libraries/unb2b_board_10gbe/src/vhdl/unb2_board_10gbe.vhd 2 additions, 0 deletions...libraries/unb2b_board_10gbe/src/vhdl/unb2_board_10gbe.vhd
- libraries/technology/10gbase_r/hdllib.cfg 5 additions, 0 deletionslibraries/technology/10gbase_r/hdllib.cfg
- libraries/technology/10gbase_r/tech_10gbase_r_arria10_e1sg.vhd 81 additions, 1 deletion...ries/technology/10gbase_r/tech_10gbase_r_arria10_e1sg.vhd
- libraries/technology/10gbase_r/tech_10gbase_r_component_pkg.vhd 74 additions, 0 deletions...ies/technology/10gbase_r/tech_10gbase_r_component_pkg.vhd
- libraries/technology/ip_arria10_e1sg/phy_10gbase_r_3/compile_ip.tcl 35 additions, 0 deletions...technology/ip_arria10_e1sg/phy_10gbase_r_3/compile_ip.tcl
- libraries/technology/ip_arria10_e1sg/phy_10gbase_r_3/generate_ip.sh 44 additions, 0 deletions...technology/ip_arria10_e1sg/phy_10gbase_r_3/generate_ip.sh
- libraries/technology/ip_arria10_e1sg/phy_10gbase_r_3/hdllib.cfg 19 additions, 0 deletions...ies/technology/ip_arria10_e1sg/phy_10gbase_r_3/hdllib.cfg
- libraries/technology/ip_arria10_e1sg/phy_10gbase_r_3/ip_arria10_e1sg_phy_10gbase_r_3.qsys 628 additions, 0 deletions...e1sg/phy_10gbase_r_3/ip_arria10_e1sg_phy_10gbase_r_3.qsys
- libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_3/compile_ip.tcl 34 additions, 0 deletions...rria10_e1sg/transceiver_reset_controller_3/compile_ip.tcl
- libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_3/generate_ip.sh 44 additions, 0 deletions...rria10_e1sg/transceiver_reset_controller_3/generate_ip.sh
- libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_3/hdllib.cfg 19 additions, 0 deletions...ip_arria10_e1sg/transceiver_reset_controller_3/hdllib.cfg
- libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_3/ip_arria10_e1sg_transceiver_reset_controller_3.qsys 175 additions, 0 deletions...ler_3/ip_arria10_e1sg_transceiver_reset_controller_3.qsys
Loading
Please register or sign in to comment