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Commit ab437259 authored by Kenneth Hiemstra's avatar Kenneth Hiemstra
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update

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boards/uniboard1/designs/unb1_ddr3_transpose/hdllib.cfg
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View file @ ab437259
......@@ -2,7 +2,6 @@ hdl_lib_name = unb1_ddr3_transpose
hdl_library_clause_name = unb1_ddr3_transpose_lib
hdl_lib_uses_synth = common mm i2c unb1_board dp eth diagnostics ddr3
hdl_lib_uses_sim =
#hdl_lib_excludes = ip_stratixiv_ddr3_uphy_4g_800_slave
hdl_lib_technology = ip_stratixiv
......@@ -33,8 +32,7 @@ quartus_vhdl_files =
quartus_qip_files =
$HDL_BUILD_DIR/quartus/unb1_ddr3_transpose/sopc_unb_ddr3_transpose.qip
#$RADIOHDL/libraries/technology/ip_stratixiv/ddr3_uphy_4g_800_master/generated/ip_stratixiv_ddr3_uphy_4g_800_master.qip
#$RADIOHDL/libraries/technology/ip_stratixiv/ddr3_uphy_4g_800_slave/generated/ip_stratixiv_ddr3_uphy_4g_800_slave.qip
$UNB/Firmware/modules/ddr3/src/ip/megawizard/uphy_4g_800_master.qip
modelsim_compile_ip_files =
# $RADIOHDL/libraries/technology/ip_stratixiv/ddr3_uphy_4g_800_master/copy_hex_files.tcl
......
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