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Commit d0f2e993 authored by Kenneth Hiemstra's avatar Kenneth Hiemstra
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add compile_ip for modelsim

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libraries/io/ddr3/src/tcl/compile_ip.tcl
+ 78
− 78
View file @ d0f2e993
......@@ -35,26 +35,26 @@ proc ensure_lib { lib } { if ![file isdirectory $lib] { vlib $lib } }
ensure_lib ./work/
vmap work ./work/
ensure_lib ./uphy_4g_800_master_a0/
vmap uphy_4g_800_master_a0 ./uphy_4g_800_master_a0/
ensure_lib ./uphy_4g_800_master_ng0/
vmap uphy_4g_800_master_ng0 ./uphy_4g_800_master_ng0/
ensure_lib ./uphy_4g_800_master_dll0/
vmap uphy_4g_800_master_dll0 ./uphy_4g_800_master_dll0/
ensure_lib ./uphy_4g_800_master_oct0/
vmap uphy_4g_800_master_oct0 ./uphy_4g_800_master_oct0/
ensure_lib ./uphy_4g_800_master_c0/
vmap uphy_4g_800_master_c0 ./uphy_4g_800_master_c0/
ensure_lib ./uphy_4g_800_master_s0/
vmap uphy_4g_800_master_s0 ./uphy_4g_800_master_s0/
ensure_lib ./uphy_4g_800_master_m0/
vmap uphy_4g_800_master_m0 ./uphy_4g_800_master_m0/
ensure_lib ./uphy_4g_800_master_p0/
vmap uphy_4g_800_master_p0 ./uphy_4g_800_master_p0/
ensure_lib ./uphy_4g_800_master_pll0/
vmap uphy_4g_800_master_pll0 ./uphy_4g_800_master_pll0/
ensure_lib ./uphy_4g_800_master_uphy_4g_800_master/
vmap uphy_4g_800_master_uphy_4g_800_master ./uphy_4g_800_master_uphy_4g_800_master/
ensure_lib ./work/
vmap uphy_4g_800_master_a0 ./work/
ensure_lib ./work/
vmap uphy_4g_800_master_ng0 ./work/
ensure_lib ./work/
vmap uphy_4g_800_master_dll0 ./work/
ensure_lib ./work/
vmap uphy_4g_800_master_oct0 ./work/
ensure_lib ./work/
vmap uphy_4g_800_master_c0 ./work/
ensure_lib ./work/
vmap uphy_4g_800_master_s0 ./work/
ensure_lib ./work/
vmap uphy_4g_800_master_m0 ./work/
ensure_lib ./work/
vmap uphy_4g_800_master_p0 ./work/
ensure_lib ./work/
vmap uphy_4g_800_master_pll0 ./work/
ensure_lib ./work/
vmap uphy_4g_800_master_uphy_4g_800_master ./work/
# ----------------------------------------
# Copy ROM/RAM files to simulation directory
......@@ -206,26 +206,26 @@ vlog -sv "$IP_DIR/alt_mem_if_common_ddr_mem_model_ddr3_mem_if_dm_pins_en
set IP_DIR "$env(UNB)/Firmware/modules/ddr3/src/ip/megawizard/uphy_4g_800_slave_sim/"
ensure_lib ./uphy_4g_800_slave_a0/
vmap uphy_4g_800_slave_a0 ./uphy_4g_800_slave_a0/
ensure_lib ./uphy_4g_800_slave_ng0/
vmap uphy_4g_800_slave_ng0 ./uphy_4g_800_slave_ng0/
ensure_lib ./uphy_4g_800_slave_dll0/
vmap uphy_4g_800_slave_dll0 ./uphy_4g_800_slave_dll0/
ensure_lib ./uphy_4g_800_slave_oct0/
vmap uphy_4g_800_slave_oct0 ./uphy_4g_800_slave_oct0/
ensure_lib ./uphy_4g_800_slave_c0/
vmap uphy_4g_800_slave_c0 ./uphy_4g_800_slave_c0/
ensure_lib ./uphy_4g_800_slave_s0/
vmap uphy_4g_800_slave_s0 ./uphy_4g_800_slave_s0/
ensure_lib ./uphy_4g_800_slave_m0/
vmap uphy_4g_800_slave_m0 ./uphy_4g_800_slave_m0/
ensure_lib ./uphy_4g_800_slave_p0/
vmap uphy_4g_800_slave_p0 ./uphy_4g_800_slave_p0/
ensure_lib ./uphy_4g_800_slave_pll0/
vmap uphy_4g_800_slave_pll0 ./uphy_4g_800_slave_pll0/
ensure_lib ./uphy_4g_800_slave_uphy_4g_800_slave/
vmap uphy_4g_800_slave_uphy_4g_800_slave ./uphy_4g_800_slave_uphy_4g_800_slave/
ensure_lib ./work/
vmap uphy_4g_800_slave_a0 ./work/
ensure_lib ./work/
vmap uphy_4g_800_slave_ng0 ./work/
ensure_lib ./work/
vmap uphy_4g_800_slave_dll0 ./work/
ensure_lib ./work/
vmap uphy_4g_800_slave_oct0 ./work/
ensure_lib ./work/
vmap uphy_4g_800_slave_c0 ./work/
ensure_lib ./work/
vmap uphy_4g_800_slave_s0 ./work/
ensure_lib ./work/
vmap uphy_4g_800_slave_m0 ./work/
ensure_lib ./work/
vmap uphy_4g_800_slave_p0 ./work/
ensure_lib ./work/
vmap uphy_4g_800_slave_pll0 ./work/
ensure_lib ./work/
vmap uphy_4g_800_slave_uphy_4g_800_slave ./work/
# ----------------------------------------
# Copy ROM/RAM files to simulation directory
......@@ -372,26 +372,26 @@ file copy -force $IP_DIR/uphy_4g_1066_master/uphy_4g_1066_master_s0_sequencer_me
file copy -force $IP_DIR/uphy_4g_1066_master/uphy_4g_1066_master_s0_AC_ROM.hex ./
file copy -force $IP_DIR/uphy_4g_1066_master/uphy_4g_1066_master_s0_inst_ROM.hex ./
ensure_lib ./uphy_4g_1066_master_a0/
vmap uphy_4g_1066_master_a0 ./uphy_4g_1066_master_a0/
ensure_lib ./uphy_4g_1066_master_ng0/
vmap uphy_4g_1066_master_ng0 ./uphy_4g_1066_master_ng0/
ensure_lib ./uphy_4g_1066_master_dll0/
vmap uphy_4g_1066_master_dll0 ./uphy_4g_1066_master_dll0/
ensure_lib ./uphy_4g_1066_master_oct0/
vmap uphy_4g_1066_master_oct0 ./uphy_4g_1066_master_oct0/
ensure_lib ./uphy_4g_1066_master_c0/
vmap uphy_4g_1066_master_c0 ./uphy_4g_1066_master_c0/
ensure_lib ./uphy_4g_1066_master_s0/
vmap uphy_4g_1066_master_s0 ./uphy_4g_1066_master_s0/
ensure_lib ./uphy_4g_1066_master_m0/
vmap uphy_4g_1066_master_m0 ./uphy_4g_1066_master_m0/
ensure_lib ./uphy_4g_1066_master_p0/
vmap uphy_4g_1066_master_p0 ./uphy_4g_1066_master_p0/
ensure_lib ./uphy_4g_1066_master_pll0/
vmap uphy_4g_1066_master_pll0 ./uphy_4g_1066_master_pll0/
ensure_lib ./uphy_4g_1066_master_uphy_4g_1066_master/
vmap uphy_4g_1066_master_uphy_4g_1066_master ./uphy_4g_1066_master_uphy_4g_1066_master/
ensure_lib ./work/
vmap uphy_4g_1066_master_a0 ./work/
ensure_lib ./work/
vmap uphy_4g_1066_master_ng0 ./work/
ensure_lib ./work/
vmap uphy_4g_1066_master_dll0 ./work/
ensure_lib ./work/
vmap uphy_4g_1066_master_oct0 ./work/
ensure_lib ./work/
vmap uphy_4g_1066_master_c0 ./work/
ensure_lib ./work/
vmap uphy_4g_1066_master_s0 ./work/
ensure_lib ./work/
vmap uphy_4g_1066_master_m0 ./work/
ensure_lib ./work/
vmap uphy_4g_1066_master_p0 ./work/
ensure_lib ./work/
vmap uphy_4g_1066_master_pll0 ./work/
ensure_lib ./work/
vmap uphy_4g_1066_master_uphy_4g_1066_master ./work/
vlog "$IP_DIR/uphy_4g_1066_master/alt_mem_ddrx_mm_st_converter.v" -work uphy_4g_1066_master_a0
vlog +incdir+$IP_DIR/uphy_4g_1066_master/ "$IP_DIR/uphy_4g_1066_master/alt_mem_ddrx_addr_cmd.v" -work uphy_4g_1066_master_ng0
......@@ -532,24 +532,24 @@ file copy -force $IP_DIR/uphy_4g_1066_slave/uphy_4g_1066_slave_s0_sequencer_mem.
file copy -force $IP_DIR/uphy_4g_1066_slave/uphy_4g_1066_slave_s0_AC_ROM.hex ./
file copy -force $IP_DIR/uphy_4g_1066_slave/uphy_4g_1066_slave_s0_inst_ROM.hex ./
ensure_lib ./uphy_4g_1066_slave_a0/
vmap uphy_4g_1066_slave_a0 ./uphy_4g_1066_slave_a0/
ensure_lib ./uphy_4g_1066_slave_ng0/
vmap uphy_4g_1066_slave_ng0 ./uphy_4g_1066_slave_ng0/
ensure_lib ./uphy_4g_1066_slave_dll0/
vmap uphy_4g_1066_slave_dll0 ./uphy_4g_1066_slave_dll0/
ensure_lib ./uphy_4g_1066_slave_c0/
vmap uphy_4g_1066_slave_c0 ./uphy_4g_1066_slave_c0/
ensure_lib ./uphy_4g_1066_slave_s0/
vmap uphy_4g_1066_slave_s0 ./uphy_4g_1066_slave_s0/
ensure_lib ./uphy_4g_1066_slave_m0/
vmap uphy_4g_1066_slave_m0 ./uphy_4g_1066_slave_m0/
ensure_lib ./uphy_4g_1066_slave_p0/
vmap uphy_4g_1066_slave_p0 ./uphy_4g_1066_slave_p0/
ensure_lib ./uphy_4g_1066_slave_pll0/
vmap uphy_4g_1066_slave_pll0 ./uphy_4g_1066_slave_pll0/
ensure_lib ./uphy_4g_1066_slave_uphy_4g_1066_slave/
vmap uphy_4g_1066_slave_uphy_4g_1066_slave ./uphy_4g_1066_slave_uphy_4g_1066_slave/
ensure_lib ./work/
vmap uphy_4g_1066_slave_a0 ./work/
ensure_lib ./work/
vmap uphy_4g_1066_slave_ng0 ./work/
ensure_lib ./work/
vmap uphy_4g_1066_slave_dll0 ./work/
ensure_lib ./work/
vmap uphy_4g_1066_slave_c0 ./work/
ensure_lib ./work/
vmap uphy_4g_1066_slave_s0 ./work/
ensure_lib ./work/
vmap uphy_4g_1066_slave_m0 ./work/
ensure_lib ./work/
vmap uphy_4g_1066_slave_p0 ./work/
ensure_lib ./work/
vmap uphy_4g_1066_slave_pll0 ./work/
ensure_lib ./work/
vmap uphy_4g_1066_slave_uphy_4g_1066_slave ./work/
# ----------------------------------------
# Compile the design files in correct order
......
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