From ab4372593955b3ea1c1911db589c9c475d7d198c Mon Sep 17 00:00:00 2001 From: Leon Hiemstra <hiemstra@astron.nl> Date: Thu, 2 Apr 2015 10:22:11 +0000 Subject: [PATCH] update --- boards/uniboard1/designs/unb1_ddr3_transpose/hdllib.cfg | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/boards/uniboard1/designs/unb1_ddr3_transpose/hdllib.cfg b/boards/uniboard1/designs/unb1_ddr3_transpose/hdllib.cfg index 610cae3fa9..7c58f0c8e6 100644 --- a/boards/uniboard1/designs/unb1_ddr3_transpose/hdllib.cfg +++ b/boards/uniboard1/designs/unb1_ddr3_transpose/hdllib.cfg @@ -2,7 +2,6 @@ hdl_lib_name = unb1_ddr3_transpose hdl_library_clause_name = unb1_ddr3_transpose_lib hdl_lib_uses_synth = common mm i2c unb1_board dp eth diagnostics ddr3 hdl_lib_uses_sim = -#hdl_lib_excludes = ip_stratixiv_ddr3_uphy_4g_800_slave hdl_lib_technology = ip_stratixiv @@ -33,8 +32,7 @@ quartus_vhdl_files = quartus_qip_files = $HDL_BUILD_DIR/quartus/unb1_ddr3_transpose/sopc_unb_ddr3_transpose.qip - #$RADIOHDL/libraries/technology/ip_stratixiv/ddr3_uphy_4g_800_master/generated/ip_stratixiv_ddr3_uphy_4g_800_master.qip - #$RADIOHDL/libraries/technology/ip_stratixiv/ddr3_uphy_4g_800_slave/generated/ip_stratixiv_ddr3_uphy_4g_800_slave.qip + $UNB/Firmware/modules/ddr3/src/ip/megawizard/uphy_4g_800_master.qip modelsim_compile_ip_files = # $RADIOHDL/libraries/technology/ip_stratixiv/ddr3_uphy_4g_800_master/copy_hex_files.tcl -- GitLab