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Commit 9f1d798e authored by Jonathan Hargreaves's avatar Jonathan Hargreaves
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Header concat module now has a single data width generic

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with 73 additions and 35 deletions
applications/arts/designs/arts_unb1_sc4/src/vhdl/arts_unb1_sc4.vhd
+ 9
− 3
View file @ 9f1d798e
......@@ -53,7 +53,7 @@ ENTITY arts_unb1_sc4 IS
g_sim : BOOLEAN := FALSE; -- Overridden by simulation test bench
g_omit_proc : BOOLEAN := FALSE; -- Overridden by simulation test bench
g_use_10GbE : BOOLEAN := TRUE; -- Overridden by simulation test bench, change to TRUE to synthesise full design
g_use_db : BOOLEAN := FALSE; -- TRUE to include data buffers in the processing module
g_use_db : BOOLEAN := TRUE; --FALSE; -- TRUE to include data buffers in the processing module
g_stamp_date : NATURAL := 0; -- Date (YYYYMMDD) -- set by QSF
g_stamp_time : NATURAL := 0; -- Time (HHMMSS) -- set by QSF
g_stamp_svn : NATURAL := 0; -- SVN revision -- set by QSF
......@@ -186,6 +186,9 @@ ARCHITECTURE str OF arts_unb1_sc4 IS
SIGNAL reg_diag_data_buf_wpfbout_mosi : t_mem_mosi;
SIGNAL reg_diag_data_buf_wpfbout_miso : t_mem_miso;
SIGNAL ram_arts_tab_beamformer_mosi : t_mem_mosi;
SIGNAL ram_arts_tab_beamformer_miso : t_mem_miso;
-------------------------------------------------------------------------------
-- Output
-------------------------------------------------------------------------------
......@@ -395,8 +398,8 @@ BEGIN
reg_diag_data_buf_wpfbout_mosi => reg_diag_data_buf_wpfbout_mosi,
reg_diag_data_buf_wpfbout_miso => reg_diag_data_buf_wpfbout_miso,
ram_arts_tab_beamformer_mosi => c_mem_mosi_rst,
ram_arts_tab_beamformer_miso => OPEN,
ram_arts_tab_beamformer_mosi => ram_arts_tab_beamformer_mosi,
ram_arts_tab_beamformer_miso => ram_arts_tab_beamformer_miso,
snk_in_arr => arts_unb1_sc4_input_src_out_arr,
......@@ -614,6 +617,9 @@ BEGIN
reg_dp_gain_v_mosi => reg_dp_gain_v_mosi,
reg_dp_gain_v_miso => reg_dp_gain_v_miso,
ram_arts_tab_beamformer_mosi => ram_arts_tab_beamformer_mosi,
ram_arts_tab_beamformer_miso => ram_arts_tab_beamformer_miso,
ram_diag_data_buf_wpfbin_mosi => ram_diag_data_buf_wpfbin_mosi,
ram_diag_data_buf_wpfbin_miso => ram_diag_data_buf_wpfbin_miso,
reg_diag_data_buf_wpfbin_mosi => reg_diag_data_buf_wpfbin_mosi,
......
applications/arts/designs/arts_unb1_sc4/src/vhdl/arts_unb1_sc4_output_iab_i_packetizer.vhd
+ 1
− 0
View file @ 9f1d798e
......@@ -422,6 +422,7 @@ BEGIN
GENERIC MAP (
g_nof_streams => 1,
g_data_w => 8,
g_symbol_w => c_byte_w,
g_hdr_field_arr => c_hdr_field_arr,
g_hdr_field_sel => c_hdr_field_sel
)
......
applications/arts/designs/arts_unb1_sc4/src/vhdl/arts_unb1_sc4_output_tab_i_packetizer.vhd
+ 10
− 5
View file @ 9f1d798e
......@@ -163,7 +163,7 @@ ARCHITECTURE str OF arts_unb1_sc4_output_tab_i_packetizer IS
CONSTANT c_nof_bytes_per_header : NATURAL := 90;
CONSTANT c_dp_fifo_sc_large_size : NATURAL := 4096;--16384;
CONSTANT c_fifo_fill_fill : NATURAL := ceil_div((g_nof_bytes_per_packet + c_nof_bytes_per_header), 8);
CONSTANT c_fifo_fill_size : NATURAL := 1024;
CONSTANT c_fifo_fill_size : NATURAL := 2048;
SIGNAL hdr_fields_in_arr : t_slv_1024_arr(0 DOWNTO 0);
......@@ -187,6 +187,8 @@ ARCHITECTURE str OF arts_unb1_sc4_output_tab_i_packetizer IS
SIGNAL dp_counter_snk_out : t_dp_siso;
SIGNAL dp_counter_src_out : t_dp_sosi;
SIGNAL dp_counter_src_in : t_dp_siso;
SIGNAL count_offset_in_arr : t_nat_natural_arr(4 DOWNTO 0) := (OTHERS=>0);
SIGNAL dp_counter_count_src_out_arr : t_dp_sosi_arr(4 DOWNTO 0);
SIGNAL dp_counter_src_out_cb : STD_LOGIC_VECTOR( 2 DOWNTO 0);
......@@ -251,7 +253,10 @@ BEGIN
-- . c2 = range(0,12,1) TAB
-- . c3 = range(0,4,1) SEQ
-- . c4 = range(0,88,1) CB x SB, then extract the CB and SB
-- The cb_rotation_offset implements per-uniboard cb rotation
-----------------------------------------------------------------------------
--count_offset_in_arr <= (sel_n(TO_UINT(id_band(1 DOWNTO 0)) , 0, 24, 48, 72) , 0, 0, 0, 0);
u_dp_counter : ENTITY dp_lib.dp_counter
GENERIC MAP (
g_nof_counters => 5, -- c3,c2,c1, c0
......@@ -269,6 +274,7 @@ BEGIN
src_out => dp_counter_src_out,
src_in => c_dp_siso_rdy, --dp_counter_src_in,
count_offset_in_arr => count_offset_in_arr,
count_src_out_arr => dp_counter_count_src_out_arr
);
......@@ -514,10 +520,9 @@ BEGIN
GENERIC MAP (
g_nof_streams => 1,
g_data_w => c_data_w,
g_symbol_w => c_byte_w,
g_hdr_field_arr => c_hdr_field_arr,
g_hdr_field_sel => c_hdr_field_sel,
g_in_symbol_w => c_byte_w,
g_out_symbol_w => c_byte_w
g_hdr_field_sel => c_hdr_field_sel
)
PORT MAP (
mm_rst => mm_rst,
......
applications/arts/designs/arts_unb1_sc4/src/vhdl/arts_unb1_sc4_output_tab_iquv_packetizer.vhd
+ 8
− 4
View file @ 9f1d798e
......@@ -188,6 +188,7 @@ ARCHITECTURE str OF arts_unb1_sc4_output_tab_iquv_packetizer IS
SIGNAL dp_counter_snk_out : t_dp_siso;
SIGNAL dp_counter_src_out : t_dp_sosi;
SIGNAL dp_counter_src_in : t_dp_siso;
SIGNAL count_offset_in_arr : t_nat_natural_arr(3 DOWNTO 0) := (OTHERS=>0);
SIGNAL dp_counter_count_src_out_arr : t_dp_sosi_arr(3 DOWNTO 0);
SIGNAL dp_counter_src_out_cb : STD_LOGIC_VECTOR( 2 DOWNTO 0);
......@@ -268,7 +269,10 @@ BEGIN
-- . c1 = range(0,12,1) TAB
-- . c2 = range(0,50,1) SEQ
-- . c3 = range(0,88,1) CB x SB, then extract the CB and SB
-- The cb_rotation_offset implements per-uniboard cb rotation
-----------------------------------------------------------------------------
--count_offset_in_arr <= (sel_n(TO_UINT(id_band(1 DOWNTO 0)) , 0, 24, 48, 72) , 0, 0, 0);
u_dp_counter : ENTITY dp_lib.dp_counter
GENERIC MAP (
g_nof_counters => 4, -- c3,c2,c1, c0
......@@ -286,6 +290,7 @@ BEGIN
src_out => dp_counter_src_out,
src_in => c_dp_siso_rdy, --dp_counter_src_in,
count_offset_in_arr => count_offset_in_arr,
count_src_out_arr => dp_counter_count_src_out_arr
);
......@@ -581,10 +586,9 @@ BEGIN
GENERIC MAP (
g_nof_streams => 1,
g_data_w => c_data_w,
g_symbol_w => c_byte_w,
g_hdr_field_arr => c_hdr_field_arr,
g_hdr_field_sel => c_hdr_field_sel,
g_in_symbol_w => c_byte_w,
g_out_symbol_w => c_byte_w
g_hdr_field_sel => c_hdr_field_sel
)
PORT MAP (
mm_rst => mm_rst,
......
applications/arts/designs/arts_unb1_sc4/tb/vhdl/tb_arts_unb1_sc4.vhd
+ 1
− 1
View file @ 9f1d798e
......@@ -96,7 +96,7 @@ ARCHITECTURE tb OF tb_arts_unb1_sc4 IS
-- Ethernet stats
CONSTANT c_eth_check_nof_packets : NATURAL := 3;
CONSTANT c_eth_packet_size_bytes : NATURAL := 100;
CONSTANT c_eth_packet_size_bytes : NATURAL := 200;
CONSTANT c_eth_packet_size_words : NATURAL := c_eth_packet_size_bytes/4+23; --23 header words TODO: formalize this
SIGNAL eth_statistics_serial_in_arr : STD_LOGIC_VECTOR(c_nof_nodes-1 DOWNTO 0);
......
applications/arts/designs/arts_unb1_sc4/tb/vhdl/tb_arts_unb1_sc4_output.vhd
+ 25
− 1
View file @ 9f1d798e
......@@ -82,6 +82,7 @@ ARCHITECTURE tb OF tb_arts_unb1_sc4_output IS
SIGNAL arts_unb1_sc4_output_iab_src_in : t_dp_siso := c_dp_siso_rdy;
SIGNAL arts_unb1_sc4_output_tab_snk_in_arr : t_dp_sosi_arr(c_nof_tabs-1 DOWNTO 0) := (OTHERS => c_dp_sosi_rst);
SIGNAL tab_src_in : t_dp_siso := c_dp_siso_rdy;
SIGNAL reg_dp_offload_tx_iab_i_hdr_dat_mosi : t_mem_mosi;
SIGNAL reg_dp_xonoff_iab_i_mosi : t_mem_mosi;
......@@ -170,6 +171,29 @@ BEGIN
reg_dp_xonoff_iab_i_mosi.wr <= '0';
END PROCESS;
p_sink_ready : PROCESS
VARIABLE sink_ready_count : NATURAL := 0;
BEGIN
WAIT UNTIL dp_rst='0';
tab_src_in.ready <= '0';
tab_src_in.xon <= '0';
WAIT FOR 1 us;
WAIT UNTIL rising_edge(dp_clk);
tab_src_in.ready <= '1';
tab_src_in.xon <= '1';
WHILE TRUE LOOP
IF sink_ready_count = 3 THEN
sink_ready_count := 0;
tab_src_in.ready <= '0';
ELSE
sink_ready_count := sink_ready_count + 1;
tab_src_in.ready <= '1';
END IF;
WAIT UNTIL rising_edge(dp_clk);
END LOOP;
END PROCESS;
arts_unb1_sc4_output_tab_snk_in_arr <= (others => arts_unb1_sc4_output_iab_snk_in);
------------------------------------------------------------------------------
......@@ -197,7 +221,7 @@ BEGIN
tab_snk_in_arr => arts_unb1_sc4_output_tab_snk_in_arr, --(others => c_dp_sosi_rst),
tab_src_out => OPEN,
tab_src_in => c_dp_siso_rdy,
tab_src_in => tab_src_in, --c_dp_siso_rdy,
reg_dp_offload_tx_tab_iquv_hdr_dat_mosi => c_mem_mosi_rst,
reg_dp_offload_tx_tab_iquv_hdr_dat_miso => OPEN,
......
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