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Commit 839ea367 authored by Reinier van der Walle's avatar Reinier van der Walle
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parent cd4121de
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1 merge request!178added missing scynchronization
Pipeline #22381 passed
......@@ -330,12 +330,13 @@ BEGIN
reset2_dsrt_qual => '1', -- Tied to '1' in example design. Tx xcvr is not used.
reset5_dsrt_qual => mm_rx_xcvr_ready_in_arr(i),
reset_in0 => mm_rst,
-- reset_out* signals are in mm_clk domain
reset_out0 => pll_reset_async_arr(i), -- Use channel 0 to reset the core pll
reset_out1 => xcvr_rst_arr(i), -- Use channel 1 to reset the transceiver reset controller
reset_out2 => open,
reset_out3 => open,
reset_out4 => open,
reset_out5 => rx_avs_rst_arr(i), -- in mm_clk domain
reset_out5 => rx_avs_rst_arr(i),
reset_out6 => rxlink_rst_async_arr(i),
reset_out7 => rxframe_rst_async_arr(i)
);
......
......@@ -330,12 +330,13 @@ BEGIN
reset2_dsrt_qual => '1', -- Tied to '1' in example design. Tx xcvr is not used.
reset5_dsrt_qual => mm_rx_xcvr_ready_in_arr(i),
reset_in0 => mm_rst,
-- reset_out* signals are in mm_clk domain
reset_out0 => pll_reset_async_arr(i), -- Use channel 0 to reset the core pll
reset_out1 => xcvr_rst_arr(i), -- Use channel 1 to reset the transceiver reset controller
reset_out2 => open,
reset_out3 => open,
reset_out4 => open,
reset_out5 => rx_avs_rst_arr(i), -- in mm_clk domain
reset_out5 => rx_avs_rst_arr(i),
reset_out6 => rxlink_rst_async_arr(i),
reset_out7 => rxframe_rst_async_arr(i)
);
......
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