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Commit 7d4c61b5 authored by Pepping's avatar Pepping
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- mm_clk made faster

parent fcb28fbb
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......@@ -133,7 +133,7 @@ ARCHITECTURE str OF mmm_fn_bf IS
CONSTANT c_dp_ram_mm_adr_w : NATURAL := ceil_log2(c_dp_ram_mm_nof_words);
-- Simulation
CONSTANT c_mm_clk_period : TIME := 8 ns;
CONSTANT c_mm_clk_period : TIME := 100 ps;
CONSTANT c_tse_clk_period : TIME := 8 ns;
CONSTANT c_sim_node_type : STRING(1 TO 2):= sel_a_b(g_sim_node_nr<4, "FN", "BN");
......@@ -308,7 +308,7 @@ BEGIN
locked_from_the_altpll_0 => mm_locked,
phasedone_from_the_altpll_0 => OPEN,
-- the_avs_eth_0
-- the_avs2_eth_0
coe_clk_export_from_the_avs_eth_0 => OPEN,
coe_reset_export_from_the_avs_eth_0 => eth1g_mm_rst,
coe_tse_address_export_from_the_avs_eth_0 => eth1g_tse_mosi.address(c_unb1_board_peripherals_mm_reg_default.reg_tse_adr_w-1 DOWNTO 0),
......
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