From 7d4c61b529f360779a4de39fe0ffc0e8000b1fd0 Mon Sep 17 00:00:00 2001
From: Pepping <pepping>
Date: Thu, 12 Feb 2015 10:22:55 +0000
Subject: [PATCH] - mm_clk made faster
---
.../unb1_fn_bf/src/vhdl/mmm_unb1_fn_bf.vhd | 42 +++++++++----------
1 file changed, 21 insertions(+), 21 deletions(-)
diff --git a/applications/unb1_fn_bf/src/vhdl/mmm_unb1_fn_bf.vhd b/applications/unb1_fn_bf/src/vhdl/mmm_unb1_fn_bf.vhd
index 514628ebd1..23cd9b06c2 100644
--- a/applications/unb1_fn_bf/src/vhdl/mmm_unb1_fn_bf.vhd
+++ b/applications/unb1_fn_bf/src/vhdl/mmm_unb1_fn_bf.vhd
@@ -133,7 +133,7 @@ ARCHITECTURE str OF mmm_fn_bf IS
CONSTANT c_dp_ram_mm_adr_w : NATURAL := ceil_log2(c_dp_ram_mm_nof_words);
-- Simulation
- CONSTANT c_mm_clk_period : TIME := 8 ns;
+ CONSTANT c_mm_clk_period : TIME := 100 ps;
CONSTANT c_tse_clk_period : TIME := 8 ns;
CONSTANT c_sim_node_type : STRING(1 TO 2):= sel_a_b(g_sim_node_nr<4, "FN", "BN");
@@ -308,26 +308,26 @@ BEGIN
locked_from_the_altpll_0 => mm_locked,
phasedone_from_the_altpll_0 => OPEN,
- -- the_avs_eth_0
- coe_clk_export_from_the_avs_eth_0 => OPEN,
- coe_reset_export_from_the_avs_eth_0 => eth1g_mm_rst,
- coe_tse_address_export_from_the_avs_eth_0 => eth1g_tse_mosi.address(c_unb1_board_peripherals_mm_reg_default.reg_tse_adr_w-1 DOWNTO 0),
- coe_tse_write_export_from_the_avs_eth_0 => eth1g_tse_mosi.wr,
- coe_tse_writedata_export_from_the_avs_eth_0 => eth1g_tse_mosi.wrdata(c_word_w-1 DOWNTO 0),
- coe_tse_read_export_from_the_avs_eth_0 => eth1g_tse_mosi.rd,
- coe_tse_readdata_export_to_the_avs_eth_0 => eth1g_tse_miso.rddata(c_word_w-1 DOWNTO 0),
- coe_tse_waitrequest_export_to_the_avs_eth_0 => eth1g_tse_miso.waitrequest,
- coe_reg_address_export_from_the_avs_eth_0 => eth1g_reg_mosi.address(c_unb1_board_peripherals_mm_reg_default.reg_eth_adr_w-1 DOWNTO 0),
- coe_reg_write_export_from_the_avs_eth_0 => eth1g_reg_mosi.wr,
- coe_reg_writedata_export_from_the_avs_eth_0 => eth1g_reg_mosi.wrdata(c_word_w-1 DOWNTO 0),
- coe_reg_read_export_from_the_avs_eth_0 => eth1g_reg_mosi.rd,
- coe_reg_readdata_export_to_the_avs_eth_0 => eth1g_reg_miso.rddata(c_word_w-1 DOWNTO 0),
- coe_irq_export_to_the_avs_eth_0 => eth1g_reg_interrupt,
- coe_ram_address_export_from_the_avs_eth_0 => eth1g_ram_mosi.address(c_unb1_board_peripherals_mm_reg_default.ram_eth_adr_w-1 DOWNTO 0),
- coe_ram_write_export_from_the_avs_eth_0 => eth1g_ram_mosi.wr,
- coe_ram_writedata_export_from_the_avs_eth_0 => eth1g_ram_mosi.wrdata(c_word_w-1 DOWNTO 0),
- coe_ram_read_export_from_the_avs_eth_0 => eth1g_ram_mosi.rd,
- coe_ram_readdata_export_to_the_avs_eth_0 => eth1g_ram_miso.rddata(c_word_w-1 DOWNTO 0),
+ -- the_avs2_eth_0
+ coe_clk_export_from_the_avs_eth_0 => OPEN,
+ coe_reset_export_from_the_avs_eth_0 => eth1g_mm_rst,
+ coe_tse_address_export_from_the_avs_eth_0 => eth1g_tse_mosi.address(c_unb1_board_peripherals_mm_reg_default.reg_tse_adr_w-1 DOWNTO 0),
+ coe_tse_write_export_from_the_avs_eth_0 => eth1g_tse_mosi.wr,
+ coe_tse_writedata_export_from_the_avs_eth_0 => eth1g_tse_mosi.wrdata(c_word_w-1 DOWNTO 0),
+ coe_tse_read_export_from_the_avs_eth_0 => eth1g_tse_mosi.rd,
+ coe_tse_readdata_export_to_the_avs_eth_0 => eth1g_tse_miso.rddata(c_word_w-1 DOWNTO 0),
+ coe_tse_waitrequest_export_to_the_avs_eth_0 => eth1g_tse_miso.waitrequest,
+ coe_reg_address_export_from_the_avs_eth_0 => eth1g_reg_mosi.address(c_unb1_board_peripherals_mm_reg_default.reg_eth_adr_w-1 DOWNTO 0),
+ coe_reg_write_export_from_the_avs_eth_0 => eth1g_reg_mosi.wr,
+ coe_reg_writedata_export_from_the_avs_eth_0 => eth1g_reg_mosi.wrdata(c_word_w-1 DOWNTO 0),
+ coe_reg_read_export_from_the_avs_eth_0 => eth1g_reg_mosi.rd,
+ coe_reg_readdata_export_to_the_avs_eth_0 => eth1g_reg_miso.rddata(c_word_w-1 DOWNTO 0),
+ coe_irq_export_to_the_avs_eth_0 => eth1g_reg_interrupt,
+ coe_ram_address_export_from_the_avs_eth_0 => eth1g_ram_mosi.address(c_unb1_board_peripherals_mm_reg_default.ram_eth_adr_w-1 DOWNTO 0),
+ coe_ram_write_export_from_the_avs_eth_0 => eth1g_ram_mosi.wr,
+ coe_ram_writedata_export_from_the_avs_eth_0 => eth1g_ram_mosi.wrdata(c_word_w-1 DOWNTO 0),
+ coe_ram_read_export_from_the_avs_eth_0 => eth1g_ram_mosi.rd,
+ coe_ram_readdata_export_to_the_avs_eth_0 => eth1g_ram_miso.rddata(c_word_w-1 DOWNTO 0),
-- the_reg_unb_sens
coe_address_export_from_the_reg_unb_sens => reg_unb_sens_mosi.address(c_unb1_board_peripherals_mm_reg_default.reg_unb_sens_adr_w-1 DOWNTO 0),
--
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