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RTSD
HDL
Commits
75ee6be2
Commit
75ee6be2
authored
5 years ago
by
Pieter Donker
Browse files
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L2SDP-78
: add some tests for offset_cnt to the testbench
parent
7800e872
Branches
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No related tags found
2 merge requests
!28
Master
,
!26
Resolve L2SDP-78
Changes
2
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2 changed files
libraries/io/ppsh/tb/vhdl/tb_mms_ppsh.vhd
+40
-21
40 additions, 21 deletions
libraries/io/ppsh/tb/vhdl/tb_mms_ppsh.vhd
libraries/io/ppsh/tb/vhdl/tb_ppsh.vhd
+40
-24
40 additions, 24 deletions
libraries/io/ppsh/tb/vhdl/tb_ppsh.vhd
with
80 additions
and
45 deletions
libraries/io/ppsh/tb/vhdl/tb_mms_ppsh.vhd
+
40
−
21
View file @
75ee6be2
...
@@ -52,6 +52,8 @@ ARCHITECTURE tb OF tb_mms_ppsh IS
...
@@ -52,6 +52,8 @@ ARCHITECTURE tb OF tb_mms_ppsh IS
SIGNAL
pps_toggle
:
STD_LOGIC
;
SIGNAL
pps_toggle
:
STD_LOGIC
;
SIGNAL
pps_stable
:
STD_LOGIC
;
SIGNAL
pps_stable
:
STD_LOGIC
;
SIGNAL
capture_cnt
:
NATURAL
;
SIGNAL
capture_cnt
:
NATURAL
;
SIGNAL
offset_cnt
:
NATURAL
;
SIGNAL
last_offset_cnt
:
NATURAL
;
BEGIN
BEGIN
...
@@ -99,6 +101,7 @@ BEGIN
...
@@ -99,6 +101,7 @@ BEGIN
-- expected_cnt = c_pps_period = 1000
-- expected_cnt = c_pps_period = 1000
proc_mem_mm_bus_wr
(
1
,
v_word
,
clk
,
reg_mosi
);
proc_mem_mm_bus_wr
(
1
,
v_word
,
clk
,
reg_mosi
);
-- Simulate reading PPS status every 10 PPS periods
-- Simulate reading PPS status every 10 PPS periods
proc_common_wait_some_cycles
(
clk
,
10
);
proc_common_wait_some_cycles
(
clk
,
10
);
FOR
I
IN
0
TO
9
LOOP
FOR
I
IN
0
TO
9
LOOP
...
@@ -111,6 +114,16 @@ BEGIN
...
@@ -111,6 +114,16 @@ BEGIN
capture_cnt
<=
TO_UINT
(
reg_miso
.
rddata
(
ceil_log2
(
c_clk_freq
)
-1
DOWNTO
0
));
capture_cnt
<=
TO_UINT
(
reg_miso
.
rddata
(
ceil_log2
(
c_clk_freq
)
-1
DOWNTO
0
));
END
LOOP
;
END
LOOP
;
-- Simulate reading PPS offset counter every 0.1 PPS periods
proc_common_wait_some_cycles
(
clk
,
10
);
FOR
I
IN
0
TO
4
LOOP
proc_common_wait_some_cycles
(
clk
,
c_pps_period
/
10
);
last_offset_cnt
<=
offset_cnt
;
proc_mem_mm_bus_rd
(
2
,
clk
,
reg_mosi
);
proc_common_wait_some_cycles
(
clk
,
1
);
offset_cnt
<=
TO_UINT
(
reg_miso
.
rddata
(
ceil_log2
(
c_clk_freq
)
-1
DOWNTO
0
));
END
LOOP
;
proc_common_wait_some_cycles
(
clk
,
100
);
proc_common_wait_some_cycles
(
clk
,
100
);
tb_end
<=
'1'
;
tb_end
<=
'1'
;
WAIT
;
WAIT
;
...
@@ -158,6 +171,12 @@ BEGIN
...
@@ -158,6 +171,12 @@ BEGIN
proc_common_wait_some_cycles
(
clk
,
c_pps_period
*
10
);
proc_common_wait_some_cycles
(
clk
,
c_pps_period
*
10
);
ASSERT
pps_stable
=
'1'
REPORT
"9) Wrong pps_stable"
SEVERITY
ERROR
;
ASSERT
pps_stable
=
'1'
REPORT
"9) Wrong pps_stable"
SEVERITY
ERROR
;
ASSERT
capture_cnt
=
1000
REPORT
"9) Wrong capture_cnt"
SEVERITY
ERROR
;
ASSERT
capture_cnt
=
1000
REPORT
"9) Wrong capture_cnt"
SEVERITY
ERROR
;
-- 10
proc_common_wait_some_cycles
(
clk
,
c_pps_period
/
10
);
ASSERT
offset_cnt
=
last_offset_cnt
REPORT
"10) Wrong offset_cnt"
SEVERITY
ERROR
;
-- 11
proc_common_wait_some_cycles
(
clk
,
c_pps_period
/
10
);
ASSERT
offset_cnt
=
last_offset_cnt
REPORT
"11) Wrong offset_cnt"
SEVERITY
ERROR
;
WAIT
;
WAIT
;
END
PROCESS
;
END
PROCESS
;
...
...
This diff is collapsed.
Click to expand it.
libraries/io/ppsh/tb/vhdl/tb_ppsh.vhd
+
40
−
24
View file @
75ee6be2
...
@@ -243,6 +243,22 @@ BEGIN
...
@@ -243,6 +243,22 @@ BEGIN
REPORT
"PPSH : Unexpected capture count value at 49 s."
SEVERITY
ERROR
;
REPORT
"PPSH : Unexpected capture count value at 49 s."
SEVERITY
ERROR
;
END
IF
;
END
IF
;
END
IF
;
END
IF
;
-- check if offset_cnt is counting
IF
(
NOW
>
7500
ms
)
AND
(
NOW
<=
7500
ms
+
c_clk_period
)
THEN
--REPORT "PPSH : offset_cnt = " & integer'image(To_integer(unsigned(offset_cnt))) SEVERITY ERROR;
IF
UNSIGNED
(
offset_cnt
)
/=
475
THEN
REPORT
"PPSH : Unexpected offset count value at 5.5 s."
SEVERITY
ERROR
;
END
IF
;
END
IF
;
IF
(
NOW
>
7700
ms
)
AND
(
NOW
<=
7700
ms
+
c_clk_period
)
THEN
--REPORT "PPSH : offset_cnt = " & integer'image(To_integer(unsigned(offset_cnt))) SEVERITY ERROR;
IF
UNSIGNED
(
offset_cnt
)
/=
675
THEN
REPORT
"PPSH : Unexpected offset count value at 5.5 s."
SEVERITY
ERROR
;
END
IF
;
END
IF
;
END
IF
;
END
IF
;
END
PROCESS
;
END
PROCESS
;
...
...
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