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Commit 7011060f authored by Eric Kooistra's avatar Eric Kooistra
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Added regression_test_vhdl key with some VHDL tb.

parent e5e2603d
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......@@ -15,6 +15,10 @@ test_bench_files =
tb/vhdl/tb_fil_ppf_single.vhd
tb/vhdl/tb_fil_ppf_wide.vhd
regression_test_vhdl =
tb/vhdl/tb_fil_ppf_single.vhd
tb/vhdl/tb_fil_ppf_wide.vhd
[modelsim_project_file]
modelsim_copy_files = src/hex hex
......
......@@ -20,6 +20,9 @@ test_bench_files =
tb/vhdl/tb_tb_rTwoSDF.vhd
tb/vhdl/tb_rTwoOrder.vhd
regression_test_vhdl =
tb/vhdl/tb_rTwoSDF.vhd
[modelsim_project_file]
modelsim_copy_files = tb/data data
......
......@@ -16,6 +16,10 @@ test_bench_files =
tb/vhdl/tb_st_calc.vhd
tb/vhdl/tb_mmf_st_sst.vhd
regression_test_vhdl =
tb/vhdl/tb_st_acc.vhd
#tb/vhdl/tb_st_calc.vhd -- tb is not self checking yet
[modelsim_project_file]
......
......@@ -37,6 +37,13 @@ test_bench_files =
tb/vhdl/tb_tb_lvdsh_dd_phs4.vhd
tb/vhdl/tb_tb_lvdsh_dd_wb4.vhd
regression_test_vhdl =
tb/vhdl/tb_aduh_dd.vhd
tb/vhdl/tb_aduh_verify.vhd
tb/vhdl/tb_mms_aduh_quad.vhd
tb/vhdl/tb_tb_lvdsh_dd_phs4.vhd
tb/vhdl/tb_tb_lvdsh_dd_wb4.vhd
[modelsim_project_file]
......
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