change environ variable name

...ds/uniboard1/designs/unb1_ddr3/src/vhdl/mmm_unb1_ddr3.vhd

...igns/unb1_ddr3_reorder/src/vhdl/mmm_unb1_ddr3_reorder.vhd

.../unb1_ddr3_transpose/src/vhdl/mmm_unb1_ddr3_transpose.vhd

...signs/unb1_ddr3_transpose/tb/python/unb_ddr3_transpose.py

.../unb1_fn_terminal_db/src/vhdl/mmm_unb1_fn_terminal_db.vhd

...ns/unb1_fn_terminal_db/tb/vhdl/tb_unb1_fn_terminal_db.vhd

...niboard1/designs/unb1_heater/src/vhdl/mmm_unb1_heater.vhd

.../uniboard1/designs/unb1_heater/tb/vhdl/tb_unb1_heater.vhd

...unb1_minimal_qsys_wo_pll/mmm_unb1_minimal_qsys_wo_pll.vhd

.../unb1_minimal_qsys_wo_pll/tb_unb1_minimal_qsys_wo_pll.vhd

...board1/designs/unb1_minimal/src/vhdl/mmm_unb1_minimal.vhd

...niboard1/designs/unb1_minimal/tb/vhdl/tb_unb1_minimal.vhd

...inal_bg_mesh_db/src/vhdl/mmm_unb1_terminal_bg_mesh_db.vhd

...signs/unb1_test/src/python/gen_hex_file_dp_ram_from_mm.py

...ds/uniboard1/designs/unb1_test/src/vhdl/mmm_unb1_test.vhd

boards/uniboard1/designs/unb1_test/tb/vhdl/tb_unb1_test.vhd

...board2/designs/unb2_minimal/src/vhdl/mmm_unb2_minimal.vhd

...niboard2/designs/unb2_minimal/tb/vhdl/tb_unb2_minimal.vhd

...ds/uniboard2/designs/unb2_test/src/vhdl/mmm_unb2_test.vhd

boards/uniboard2/designs/unb2_test/tb/vhdl/tb_unb2_test.vhd