Made tb_sens self stopping and self checking.

libraries/base/sens/hdllib.cfg

@@ -11,6 +11,9 @@ synth_files =
 test_bench_files =
     tb/vhdl/tb_sens.vhd
 
+regression_test_vhdl = 
+    tb/vhdl/tb_sens.vhd
+
 
 [modelsim_project_file]
 

libraries/base/sens/tb/vhdl/tb_sens.vhd

@@ -22,9 +22,11 @@
 ENTITY tb_sens IS
 END tb_sens;
 
-LIBRARY IEEE, i2c_lib;
+LIBRARY IEEE, common_lib, i2c_lib;
 USE IEEE.std_logic_1164.ALL;
 USE IEEE.numeric_std.ALL;
+USE common_lib.common_pkg.ALL;
+USE common_lib.tb_common_pkg.ALL;
 
 
 ARCHITECTURE tb OF tb_sens IS
@@ -55,6 +57,7 @@ ARCHITECTURE tb OF tb_sens IS
   
   TYPE t_sens_data_arr IS ARRAY (0 TO c_sens_temp_volt_sz-1) OF STD_LOGIC_VECTOR(c_bus_dat_w-1 DOWNTO 0);
   
+  SIGNAL tb_end          : STD_LOGIC := '0';
   SIGNAL clk             : STD_LOGIC := '0';
   SIGNAL rst             : STD_LOGIC := '1';
  
@@ -66,14 +69,14 @@ ARCHITECTURE tb OF tb_sens IS
   SIGNAL sens_data       : STD_LOGIC_VECTOR(c_sens_temp_volt_sz*c_bus_dat_w-1 DOWNTO 0);
   
   SIGNAL sens_data_bytes : t_sens_data_arr;
+  SIGNAL exp_data_bytes  : t_nat_natural_arr(0 TO c_sens_temp_volt_sz-1) := (92, 147, 127, 40, 60, 70, 71, 72, 73);  -- expected 9 bytes as read by SEQUENCE in sens_ctrl
   
 BEGIN
 
-  -- Run 50 us
-  -- Expected sens_data_bytes : 92, 147, 127, 40, 60, 70, 71, 72, 73   -- 9 bytes as read by SEQUENCE in sens_ctrl
+  -- run -all
 
   rst <= '0' AFTER 4*c_clk_period;
-  clk <= NOT clk AFTER c_clk_period/2;
+  clk <= NOT clk or tb_end AFTER c_clk_period/2;
   
   p_debug : PROCESS (sens_data)
   BEGIN
@@ -82,6 +85,22 @@ BEGIN
     END LOOP;
   END PROCESS;
   
+  p_verify : PROCESS
+  BEGIN
+    proc_common_wait_until_high(clk, sens_evt);
+    proc_common_wait_until_low(clk, sens_evt);
+    proc_common_wait_some_cycles(clk, 10);
+    FOR I IN sens_data_bytes'RANGE LOOP
+      IF TO_UINT(sens_data_bytes(I))/=exp_data_bytes(I) THEN
+        REPORT "Unexpected I2C read sensors result." SEVERITY ERROR;
+        EXIT;
+      END IF;
+    END LOOP;
+    proc_common_wait_some_cycles(clk, 100);
+    tb_end <= '1';
+    WAIT;
+  END PROCESS;
+
   -- I2C bus
   scl <= 'H';          -- model I2C pull up
   sda <= 'H';          -- model I2C pull up