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Commit 1e1a147c authored by Eric Kooistra's avatar Eric Kooistra
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Added description of tools/quartus/run_altera_simlib_comp for compiling the...

Added description of tools/quartus/run_altera_simlib_comp for compiling the Altera libraries for simulation with Modelsim.
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......@@ -28,7 +28,8 @@ Contents:
c) Simulation
7) Synthesis in Quartus
a) Creating the Quartus project files
a) Compiling the Altera libraries for simulation with Modelsim
b) Creating the Quartus project files
8) Design revisions
......@@ -427,7 +428,16 @@ entire eth library gets verified in one simulation.
7) Synthesis in Quartus
a) Creating the Quartus project files
a) Compiling the Altera libraries for simulation with Modelsim
The Altera verilog and vhdl libraries for the required FPGA device families can be compile using:
> tools/quartus/run_altera_simlib_comp <tool target> <compilation output directory> <FPGA device family>
This script must be used and not the tools/Launch simulation library compiler in the Quartus GUI, because
the libraries have to be compiled with the 'vlib -type directory' option to be able to use 'mk all'.
b) Creating the Quartus project files
The quartus_config.py creates the Quartus qpf, qsf and or qip files for a design library.
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