libraries/io/ddr/src/vhdl/io_ddr.vhd · e8956d9d6b319574d7dd465a527ac10d83bce3a2 · RTSD / HDL · GitLab

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10 years ago
e8956d9d
Added g_sim, when TRUE then use internal DDR memory model in tech_ddr... · e8956d9d
Eric Kooistra authored 10 years ago
```
Added g_sim, when TRUE then use internal DDR memory model in tech_ddr component. When FALSE use DDR memory model in test bench.
```
e8956d9d

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Added g_sim, when TRUE then use internal DDR memory model in tech_ddr...
Eric Kooistra authored 10 years ago
```
Added g_sim, when TRUE then use internal DDR memory model in tech_ddr component. When FALSE use DDR memory model in test bench.
```

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