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LOFAR2.0
sdptr
Commits
affaa157
Commit
affaa157
authored
Sep 29, 2021
by
Pieter Donker
Browse files
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Downloads
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Plain Diff
L2SDP-489
, with review comments.
parent
d71f6cf7
No related branches found
No related tags found
1 merge request
!28
Resolve L2SDP-489
Changes
2
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2 changed files
src/constants.h
+1
-0
1 addition, 0 deletions
src/constants.h
src/periph/fpga.cpp
+4
-4
4 additions, 4 deletions
src/periph/fpga.cpp
with
5 additions
and
4 deletions
src/constants.h
+
1
−
0
View file @
affaa157
...
@@ -34,6 +34,7 @@
...
@@ -34,6 +34,7 @@
#define C_S_pn 12
#define C_S_pn 12
#define C_W_adc 14
#define C_W_adc 14
#define C_F_adc 200E6
#define C_F_adc 200E6
#define C_T_adc (1 / C_F_adc)
#define C_WG_MODE_OFF 0
#define C_WG_MODE_OFF 0
#define C_WG_MODE_CALC 1
#define C_WG_MODE_CALC 1
...
...
This diff is collapsed.
Click to expand it.
src/periph/fpga.cpp
+
4
−
4
View file @
affaa157
...
@@ -1441,7 +1441,7 @@ bool Periph_fpga::write_xst_processing_enable(const char *data)
...
@@ -1441,7 +1441,7 @@ bool Periph_fpga::write_xst_processing_enable(const char *data)
if
(
retval
==
true
)
{
if
(
retval
==
true
)
{
start_bsn
=
(((
uint64_t
)
reg
[
1
]
<<
32
)
+
reg
[
0
]);
start_bsn
=
(((
uint64_t
)
reg
[
1
]
<<
32
)
+
reg
[
0
]);
cout
<<
"bsn="
<<
to_string
(
start_bsn
)
<<
endl
;
cout
<<
"bsn="
<<
to_string
(
start_bsn
)
<<
endl
;
start_bsn
=
start_bsn
+
2
*
C_F_adc
/
C_N_fft
;
start_bsn
=
start_bsn
+
(
2
*
C_F_adc
)
/
C_N_fft
;
cout
<<
"new bsn="
<<
to_string
(
start_bsn
)
<<
endl
;
cout
<<
"new bsn="
<<
to_string
(
start_bsn
)
<<
endl
;
reg
[
0
]
=
(
uint32_t
)(
start_bsn
&
0xffffffff
);
reg
[
0
]
=
(
uint32_t
)(
start_bsn
&
0xffffffff
);
reg
[
1
]
=
(
uint32_t
)((
start_bsn
>>
32
)
&
0xffffffff
);
reg
[
1
]
=
(
uint32_t
)((
start_bsn
>>
32
)
&
0xffffffff
);
...
@@ -1467,7 +1467,7 @@ bool Periph_fpga::read_xst_integration_interval(TermOutput& termout, int format)
...
@@ -1467,7 +1467,7 @@ bool Periph_fpga::read_xst_integration_interval(TermOutput& termout, int format)
uint32_t
data
[
20
];
uint32_t
data
[
20
];
memset
((
void
*
)
data
,
0
,
sizeof
(
data
));
memset
((
void
*
)
data
,
0
,
sizeof
(
data
));
retval
=
Read
(
"mm/0/REG_BSN_SYNC_SCHEDULER_XSUB/0/ctrl_interval_size"
,
data
);
retval
=
Read
(
"mm/0/REG_BSN_SYNC_SCHEDULER_XSUB/0/ctrl_interval_size"
,
data
);
double
interval
=
(
double
)
data
[
0
]
/
C_
F
_adc
;
double
interval
=
(
double
)
data
[
0
]
*
C_
T
_adc
;
double
*
_ptr
=
(
double
*
)
termout
.
val
;
double
*
_ptr
=
(
double
*
)
termout
.
val
;
*
_ptr
=
interval
;
*
_ptr
=
interval
;
...
@@ -1507,7 +1507,7 @@ bool Periph_fpga::read_xst_input_sync_at_bsn(TermOutput& termout, int format, in
...
@@ -1507,7 +1507,7 @@ bool Periph_fpga::read_xst_input_sync_at_bsn(TermOutput& termout, int format, in
bool
retval
=
true
;
bool
retval
=
true
;
int64_t
bsn
=
my_xst_input_bsn_at_sync
;
int64_t
bsn
=
my_xst_input_bsn_at_sync
;
if
(
mode
==
R_UCP
)
{
if
(
mode
==
R_UCP
)
{
uint32_t
data
[
2
0
];
uint32_t
data
[
2
];
memset
((
void
*
)
data
,
0
,
sizeof
(
data
));
memset
((
void
*
)
data
,
0
,
sizeof
(
data
));
string
regname
;
string
regname
;
regname
=
"mm/0/REG_BSN_SYNC_SCHEDULER_XSUB/0/mon_input_bsn_at_sync"
;
regname
=
"mm/0/REG_BSN_SYNC_SCHEDULER_XSUB/0/mon_input_bsn_at_sync"
;
...
@@ -1526,7 +1526,7 @@ bool Periph_fpga::read_xst_output_sync_bsn(TermOutput& termout, int format, int
...
@@ -1526,7 +1526,7 @@ bool Periph_fpga::read_xst_output_sync_bsn(TermOutput& termout, int format, int
bool
retval
=
true
;
bool
retval
=
true
;
int64_t
bsn
=
my_xst_output_sync_bsn
;
int64_t
bsn
=
my_xst_output_sync_bsn
;
if
(
mode
==
R_UCP
)
{
if
(
mode
==
R_UCP
)
{
uint32_t
data
[
2
0
];
uint32_t
data
[
2
];
memset
((
void
*
)
data
,
0
,
sizeof
(
data
));
memset
((
void
*
)
data
,
0
,
sizeof
(
data
));
string
regname
;
string
regname
;
regname
=
"mm/0/REG_BSN_SYNC_SCHEDULER_XSUB/0/mon_output_sync_bsn"
;
regname
=
"mm/0/REG_BSN_SYNC_SCHEDULER_XSUB/0/mon_output_sync_bsn"
;
...
...
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Click to expand it.
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