diff --git a/src/constants.h b/src/constants.h index c520fb4ec5bcb9de9a554294b673ab028647fb6a..f86fe46083c88b1a202a4540cb91fded2b5c38d6 100644 --- a/src/constants.h +++ b/src/constants.h @@ -34,6 +34,7 @@ #define C_S_pn 12 #define C_W_adc 14 #define C_F_adc 200E6 +#define C_T_adc (1 / C_F_adc) #define C_WG_MODE_OFF 0 #define C_WG_MODE_CALC 1 diff --git a/src/periph/fpga.cpp b/src/periph/fpga.cpp index 27b2beee9a63dad5fd18c4cc104fec08716b2bbd..1fc5a5daec041ec41017dcb90616482252ea7889 100644 --- a/src/periph/fpga.cpp +++ b/src/periph/fpga.cpp @@ -1441,7 +1441,7 @@ bool Periph_fpga::write_xst_processing_enable(const char *data) if (retval == true) { start_bsn = (((uint64_t)reg[1] << 32) + reg[0]); cout << "bsn=" << to_string(start_bsn) << endl; - start_bsn = start_bsn + 2 * C_F_adc / C_N_fft; + start_bsn = start_bsn + (2 * C_F_adc) / C_N_fft; cout << "new bsn=" << to_string(start_bsn) << endl; reg[0] = (uint32_t)(start_bsn & 0xffffffff); reg[1] = (uint32_t)((start_bsn >> 32) & 0xffffffff); @@ -1467,7 +1467,7 @@ bool Periph_fpga::read_xst_integration_interval(TermOutput& termout, int format) uint32_t data[20]; memset((void *)data, 0, sizeof(data)); retval = Read("mm/0/REG_BSN_SYNC_SCHEDULER_XSUB/0/ctrl_interval_size", data); - double interval = (double)data[0] / C_F_adc; + double interval = (double)data[0] * C_T_adc; double *_ptr = (double *)termout.val; *_ptr = interval; @@ -1507,7 +1507,7 @@ bool Periph_fpga::read_xst_input_sync_at_bsn(TermOutput& termout, int format, in bool retval = true; int64_t bsn = my_xst_input_bsn_at_sync; if (mode == R_UCP) { - uint32_t data[20]; + uint32_t data[2]; memset((void *)data, 0, sizeof(data)); string regname; regname = "mm/0/REG_BSN_SYNC_SCHEDULER_XSUB/0/mon_input_bsn_at_sync"; @@ -1526,7 +1526,7 @@ bool Periph_fpga::read_xst_output_sync_bsn(TermOutput& termout, int format, int bool retval = true; int64_t bsn = my_xst_output_sync_bsn; if (mode == R_UCP) { - uint32_t data[20]; + uint32_t data[2]; memset((void *)data, 0, sizeof(data)); string regname; regname = "mm/0/REG_BSN_SYNC_SCHEDULER_XSUB/0/mon_output_sync_bsn";