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Clarify g_nof_destinations_max design revision parameter and package constants...

Merged Eric Kooistra requested to merge L2SDP-964 into master
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@@ -209,58 +209,65 @@ begin
proc_common_wait_until_low(dp_clk, mm_rst);
proc_common_wait_some_cycles(mm_clk, 10);
----------------------------------------------------------------------------
-- BDO multiple destinations info in sdp_bdo_destinations_reg
----------------------------------------------------------------------------
-- . Set nof_destinations = g_nof_destinations
v_offset := c_sdp_bdo_mm_nof_destinations_max * 4;
proc_mem_mm_bus_wr(v_offset + 0, g_nof_destinations, mm_clk, reg_destinations_cipo, reg_destinations_copi);
-- . Read back nof_destinations
proc_common_wait_cross_clock_domain_latency(c_mm_clk_period, c_dp_clk_period, c_common_cross_clock_domain_latency * 2);
proc_mem_mm_bus_rd(v_offset + 0, mm_clk, reg_destinations_cipo, reg_destinations_copi);
proc_mem_mm_bus_rd_latency(1, mm_clk);
rd_nof_destinations <= to_uint(reg_destinations_cipo.rddata(c_word_w - 1 downto 0));
proc_common_wait_some_cycles(mm_clk, 1);
assert rd_nof_destinations = g_nof_destinations report "Wrong MM readback nof_destinations" severity error;
-- . Read nof_destinations_act, to check that g_nof_destinations is
-- forced to c_nof_destinations
proc_common_wait_cross_clock_domain_latency(c_mm_clk_period, c_dp_clk_period, c_common_cross_clock_domain_latency * 2);
proc_mem_mm_bus_rd(v_offset + 1, mm_clk, reg_destinations_cipo, reg_destinations_copi);
proc_mem_mm_bus_rd_latency(1, mm_clk);
rd_nof_destinations_act <= to_uint(reg_destinations_cipo.rddata(c_word_w - 1 downto 0));
proc_common_wait_some_cycles(mm_clk, 1);
assert rd_nof_destinations_act = c_nof_destinations report "Wrong MM read nof_destinations_act" severity error;
-- . Use same destination MAC/IP/UDP for all destinations, to ease rx_beamlet_header verification
-- and to have same c_exp_ip_header_checksum value for all c_nof_destinations.
for DI in 0 to c_nof_destinations - 1 loop
proc_mem_mm_bus_wr(DI * 2 + 1, to_uint(c_sdp_cep_eth_dst_mac(47 downto 32)), mm_clk, reg_destinations_cipo, reg_destinations_copi);
proc_mem_mm_bus_wr(DI * 2, to_sint(c_sdp_cep_eth_dst_mac(31 downto 0)), mm_clk, reg_destinations_cipo, reg_destinations_copi);
end loop;
v_offset := c_sdp_bdo_mm_nof_destinations_max * 2;
for DI in 0 to c_nof_destinations - 1 loop
proc_mem_mm_bus_wr(v_offset + DI, to_sint(c_sdp_cep_ip_dst_addr), mm_clk, reg_destinations_cipo, reg_destinations_copi);
end loop;
v_offset := c_sdp_bdo_mm_nof_destinations_max * 3;
for DI in 0 to c_nof_destinations - 1 loop
proc_mem_mm_bus_wr(v_offset + DI, to_uint(c_sdp_cep_udp_dst_port), mm_clk, reg_destinations_cipo, reg_destinations_copi);
end loop;
if c_nof_destinations_max = 1 then
--------------------------------------------------------------------------
-- BDO one destination fields in dp_offload_tx_v3
--------------------------------------------------------------------------
proc_mem_mm_bus_wr(41, to_uint(c_sdp_cep_eth_dst_mac(47 downto 32)), mm_clk, hdr_dat_cipo, hdr_dat_copi);
proc_mem_mm_bus_wr(40, to_sint(c_sdp_cep_eth_dst_mac(31 downto 0)), mm_clk, hdr_dat_cipo, hdr_dat_copi);
proc_mem_mm_bus_wr(25, to_sint(c_sdp_cep_ip_dst_addr), mm_clk, hdr_dat_cipo, hdr_dat_copi);
proc_mem_mm_bus_wr(23, to_uint(c_sdp_cep_udp_dst_port), mm_clk, hdr_dat_cipo, hdr_dat_copi);
else
----------------------------------------------------------------------------
-- BDO multiple destinations info in sdp_bdo_destinations_reg
----------------------------------------------------------------------------
-- . Set nof_destinations = g_nof_destinations
v_offset := c_sdp_bdo_mm_nof_destinations_max * 4;
proc_mem_mm_bus_wr(v_offset + 0, g_nof_destinations, mm_clk, reg_destinations_cipo, reg_destinations_copi);
-- . Read back nof_destinations
proc_common_wait_cross_clock_domain_latency(c_mm_clk_period, c_dp_clk_period, c_common_cross_clock_domain_latency * 2);
proc_mem_mm_bus_rd(v_offset + 0, mm_clk, reg_destinations_cipo, reg_destinations_copi);
proc_mem_mm_bus_rd_latency(1, mm_clk);
rd_nof_destinations <= to_uint(reg_destinations_cipo.rddata(c_word_w - 1 downto 0));
proc_common_wait_some_cycles(mm_clk, 1);
assert rd_nof_destinations = g_nof_destinations report "Wrong MM readback nof_destinations" severity error;
-- . Read nof_destinations_act, to check that g_nof_destinations is
-- forced to c_nof_destinations
proc_common_wait_cross_clock_domain_latency(c_mm_clk_period, c_dp_clk_period, c_common_cross_clock_domain_latency * 2);
proc_mem_mm_bus_rd(v_offset + 1, mm_clk, reg_destinations_cipo, reg_destinations_copi);
proc_mem_mm_bus_rd_latency(1, mm_clk);
rd_nof_destinations_act <= to_uint(reg_destinations_cipo.rddata(c_word_w - 1 downto 0));
proc_common_wait_some_cycles(mm_clk, 1);
assert rd_nof_destinations_act = c_nof_destinations report "Wrong MM read nof_destinations_act" severity error;
-- . Use same destination MAC/IP/UDP for all destinations, to ease rx_beamlet_header verification
-- and to have same c_exp_ip_header_checksum value for all c_nof_destinations.
for DI in 0 to c_nof_destinations - 1 loop
proc_mem_mm_bus_wr(DI * 2 + 1, to_uint(c_sdp_cep_eth_dst_mac(47 downto 32)), mm_clk, reg_destinations_cipo, reg_destinations_copi);
proc_mem_mm_bus_wr(DI * 2, to_sint(c_sdp_cep_eth_dst_mac(31 downto 0)), mm_clk, reg_destinations_cipo, reg_destinations_copi);
end loop;
v_offset := c_sdp_bdo_mm_nof_destinations_max * 2;
for DI in 0 to c_nof_destinations - 1 loop
proc_mem_mm_bus_wr(v_offset + DI, to_sint(c_sdp_cep_ip_dst_addr), mm_clk, reg_destinations_cipo, reg_destinations_copi);
end loop;
v_offset := c_sdp_bdo_mm_nof_destinations_max * 3;
for DI in 0 to c_nof_destinations - 1 loop
proc_mem_mm_bus_wr(v_offset + DI, to_uint(c_sdp_cep_udp_dst_port), mm_clk, reg_destinations_cipo, reg_destinations_copi);
end loop;
end if;
----------------------------------------------------------------------------
-- BDO header src and single destination fields in dp_offload_tx_v3
-- BDO header src fields in dp_offload_tx_v3
----------------------------------------------------------------------------
-- . Use sim default dst and src MAC, IP, UDP port from sdp_pkg.vhd and based on c_gn_id
-- . Use sim default dst and src MAC/IP/UDP port from sdp_pkg.vhd and based
-- on c_gn_id
-- . use signed to fit 32 b in integer
proc_mem_mm_bus_wr(39, to_uint(c_cep_eth_src_mac(47 downto 32)), mm_clk, hdr_dat_cipo, hdr_dat_copi);
proc_mem_mm_bus_wr(38, to_sint(c_cep_eth_src_mac(31 downto 0)), mm_clk, hdr_dat_cipo, hdr_dat_copi);
proc_mem_mm_bus_wr(26, to_sint(c_cep_ip_src_addr), mm_clk, hdr_dat_cipo, hdr_dat_copi);
proc_mem_mm_bus_wr(24, to_uint(c_cep_udp_src_port), mm_clk, hdr_dat_cipo, hdr_dat_copi);
proc_mem_mm_bus_wr(41, to_uint(c_sdp_cep_eth_dst_mac(47 downto 32)), mm_clk, hdr_dat_cipo, hdr_dat_copi);
proc_mem_mm_bus_wr(40, to_sint(c_sdp_cep_eth_dst_mac(31 downto 0)), mm_clk, hdr_dat_cipo, hdr_dat_copi);
proc_mem_mm_bus_wr(25, to_sint(c_sdp_cep_ip_dst_addr), mm_clk, hdr_dat_cipo, hdr_dat_copi);
proc_mem_mm_bus_wr(23, to_uint(c_sdp_cep_udp_dst_port), mm_clk, hdr_dat_cipo, hdr_dat_copi);
----------------------------------------------------------------------------
-- Enable beamlet output (dp_xonoff)
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