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RTSD
HDL
Commits
ff779c76
Commit
ff779c76
authored
2 years ago
by
Eric Kooistra
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Accept raw or quantized input subbands. Use pipelining for requantize to W_crosslet width.
parent
1d55ba48
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1 merge request
!289
Rename c_sdp_W_fsub_wg into c_sdp_W_local_oscillator. Use...
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applications/lofar2/libraries/sdp/src/vhdl/node_sdp_correlator.vhd
+18
-12
18 additions, 12 deletions
...ons/lofar2/libraries/sdp/src/vhdl/node_sdp_correlator.vhd
with
18 additions
and
12 deletions
applications/lofar2/libraries/sdp/src/vhdl/node_sdp_correlator.vhd
+
18
−
12
View file @
ff779c76
...
@@ -42,9 +42,11 @@ USE work.sdp_pkg.ALL;
...
@@ -42,9 +42,11 @@ USE work.sdp_pkg.ALL;
ENTITY
node_sdp_correlator
IS
ENTITY
node_sdp_correlator
IS
GENERIC
(
GENERIC
(
g_sim
:
BOOLEAN
:
=
FALSE
;
g_sim
:
BOOLEAN
:
=
FALSE
;
g_sim_sdp
:
t_sdp_sim
:
=
c_sdp_sim
;
g_sim_sdp
:
t_sdp_sim
:
=
c_sdp_sim
;
g_P_sq
:
NATURAL
:
=
c_sdp_P_sq
g_P_sq
:
NATURAL
:
=
c_sdp_P_sq
;
g_subband_raw_dat_w
:
NATURAL
:
=
c_sdp_W_subband
;
g_subband_raw_fraction_w
:
NATURAL
:
=
0
);
);
PORT
(
PORT
(
dp_clk
:
IN
STD_LOGIC
;
dp_clk
:
IN
STD_LOGIC
;
...
@@ -138,22 +140,26 @@ ARCHITECTURE str OF node_sdp_correlator IS
...
@@ -138,22 +140,26 @@ ARCHITECTURE str OF node_sdp_correlator IS
SIGNAL
prev_crosslets_info_rec
:
t_sdp_crosslets_info
;
SIGNAL
prev_crosslets_info_rec
:
t_sdp_crosslets_info
;
SIGNAL
nof_crosslets_reg
:
STD_LOGIC_VECTOR
(
c_sdp_nof_crosslets_reg_w
-1
DOWNTO
0
);
SIGNAL
nof_crosslets_reg
:
STD_LOGIC_VECTOR
(
c_sdp_nof_crosslets_reg_w
-1
DOWNTO
0
);
SIGNAL
nof_crosslets
:
STD_LOGIC_VECTOR
(
c_sdp_nof_crosslets_reg_w
-1
DOWNTO
0
);
SIGNAL
nof_crosslets
:
STD_LOGIC_VECTOR
(
c_sdp_nof_crosslets_reg_w
-1
DOWNTO
0
);
BEGIN
BEGIN
---------------------------------------------------------------
---------------------------------------------------------------
-- Requantize 18b to 16b
-- Requantize 18b to 16b
---------------------------------------------------------------
---------------------------------------------------------------
gen_requantize
:
FOR
I
IN
0
TO
c_sdp_P_pfb
-1
GENERATE
gen_requantize
:
FOR
I
IN
0
TO
c_sdp_P_pfb
-1
GENERATE
u_dp_requantize
:
ENTITY
dp_lib
.
dp_requantize
u_dp_requantize
:
ENTITY
dp_lib
.
dp_requantize
GENERIC
MAP
(
GENERIC
MAP
(
g_complex
=>
TRUE
,
g_complex
=>
TRUE
,
g_representation
=>
"SIGNED"
,
g_representation
=>
"SIGNED"
,
g_lsb_w
=>
0
,
g_lsb_w
=>
g_subband_raw_fraction_w
,
g_lsb_round
=>
TRUE
,
g_lsb_round
=>
TRUE
,
-- round subband fraction
g_lsb_round_clip
=>
FALSE
,
g_lsb_round_clip
=>
FALSE
,
g_msb_clip
=>
TRUE
,
g_msb_clip
=>
TRUE
,
-- clip subband overflow
g_msb_clip_symmetric
=>
FALSE
,
g_msb_clip_symmetric
=>
FALSE
,
g_in_dat_w
=>
c_sdp_W_subband
,
g_pipeline_remove_lsb
=>
1
,
g_out_dat_w
=>
c_sdp_W_crosslet
g_pipeline_remove_msb
=>
1
,
g_in_dat_w
=>
g_subband_raw_dat_w
,
g_out_dat_w
=>
c_sdp_W_crosslet
)
)
PORT
MAP
(
PORT
MAP
(
rst
=>
dp_rst
,
rst
=>
dp_rst
,
...
...
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