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Commit fc0dabaf authored by Eric Kooistra's avatar Eric Kooistra
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Renamed c_nof_blk into c_nof_blk_min. Renamed v_extra, dbg_extra into v_accumulate, dbg_accumulate.

parent 0fac6976
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1 merge request!132Renamed proc_dp_verify_sync_v2() into overloaded proc_dp_verify_sync() and...
...@@ -99,7 +99,7 @@ ARCHITECTURE tb OF tb_dp_bsn_source_v2 IS ...@@ -99,7 +99,7 @@ ARCHITECTURE tb OF tb_dp_bsn_source_v2 IS
SIGNAL expected_bsn : NATURAL := 0; SIGNAL expected_bsn : NATURAL := 0;
SIGNAL expected_offset_bsn : NATURAL := 0; SIGNAL expected_offset_bsn : NATURAL := 0;
SIGNAL dbg_nof_blk : NATURAL := 0; SIGNAL dbg_nof_blk : NATURAL := 0;
SIGNAL dbg_extra : NATURAL := 0; SIGNAL dbg_accumulate : NATURAL := 0;
SIGNAL dbg_expected_bsn : NATURAL := 0; SIGNAL dbg_expected_bsn : NATURAL := 0;
BEGIN BEGIN
...@@ -234,7 +234,7 @@ BEGIN ...@@ -234,7 +234,7 @@ BEGIN
bs_sosi.sop, bs_sosi.sop,
bs_sosi.bsn, bs_sosi.bsn,
dbg_nof_blk, dbg_nof_blk,
dbg_extra, dbg_accumulate,
dbg_expected_bsn); dbg_expected_bsn);
----------------------------------------------------------------------------- -----------------------------------------------------------------------------
......
...@@ -488,7 +488,7 @@ PACKAGE tb_dp_pkg IS ...@@ -488,7 +488,7 @@ PACKAGE tb_dp_pkg IS
SIGNAL bsn : IN STD_LOGIC_VECTOR; SIGNAL bsn : IN STD_LOGIC_VECTOR;
-- for debug purposes -- for debug purposes
SIGNAL dbg_nof_blk : OUT NATURAL; SIGNAL dbg_nof_blk : OUT NATURAL;
SIGNAL dbg_extra : OUT NATURAL; SIGNAL dbg_accumulate : OUT NATURAL;
SIGNAL dbg_expected_bsn : OUT NATURAL); SIGNAL dbg_expected_bsn : OUT NATURAL);
-- Verify the DUT output sop and eop -- Verify the DUT output sop and eop
...@@ -2351,33 +2351,33 @@ PACKAGE BODY tb_dp_pkg IS ...@@ -2351,33 +2351,33 @@ PACKAGE BODY tb_dp_pkg IS
SIGNAL bsn : IN STD_LOGIC_VECTOR; SIGNAL bsn : IN STD_LOGIC_VECTOR;
-- for debug purposes -- for debug purposes
SIGNAL dbg_nof_blk : OUT NATURAL; SIGNAL dbg_nof_blk : OUT NATURAL;
SIGNAL dbg_extra : OUT NATURAL; SIGNAL dbg_accumulate : OUT NATURAL;
SIGNAL dbg_expected_bsn : OUT NATURAL) IS SIGNAL dbg_expected_bsn : OUT NATURAL) IS
CONSTANT c_bsn_w : NATURAL := sel_a_b(bsn'LENGTH>31, 31, bsn'LENGTH); -- use maximally c_natural_w = 31 bit of BSN slv to allow calculations with integers CONSTANT c_bsn_w : NATURAL := sel_a_b(bsn'LENGTH>31, 31, bsn'LENGTH); -- use maximally c_natural_w = 31 bit of BSN slv to allow calculations with integers
CONSTANT c_nof_blk : NATURAL := c_sync_period / c_block_size; -- minimum number of blocks in sync period CONSTANT c_nof_blk_min : NATURAL := c_sync_period / c_block_size; -- minimum number of blocks in sync period
CONSTANT c_extra : NATURAL := c_sync_period MOD c_block_size; -- number of extra samples in sync period CONSTANT c_extra : NATURAL := c_sync_period MOD c_block_size; -- number of extra samples in sync period
VARIABLE v_bsn : NATURAL := TO_UINT(bsn(c_bsn_w-1 DOWNTO 0)); VARIABLE v_bsn : NATURAL := TO_UINT(bsn(c_bsn_w-1 DOWNTO 0));
VARIABLE v_expected_sync : BOOLEAN := FALSE; -- default FALSE, e.g. when bsn < c_start_bsn is in the past VARIABLE v_expected_sync : BOOLEAN := FALSE; -- default FALSE, e.g. when bsn < c_start_bsn is in the past
VARIABLE v_expected_bsn : NATURAL := c_start_bsn; -- BSN that is expected to have a sync, intialize with start BSN VARIABLE v_expected_bsn : NATURAL := c_start_bsn; -- BSN that is expected to have a sync, intialize with start BSN
VARIABLE v_nof_blk : NATURAL := c_nof_blk + 1; -- number of blocks in period, first sync period will be 1 block longer to achieve the fraction part VARIABLE v_nof_blk : NATURAL := c_nof_blk_min + 1; -- number of blocks in period, first sync period will be 1 block longer to achieve the fraction part
VARIABLE v_extra : INTEGER := c_block_size - c_extra; -- number of extra samples in period, first sync period will have v_extra more VARIABLE v_accumulate : INTEGER := c_block_size - c_extra; -- number of extra samples in period, first sync period will have v_accumulate more
BEGIN BEGIN
-- Determine v_expected_sync -- Determine v_expected_sync
IF c_extra = 0 THEN IF c_extra = 0 THEN
-- The sync period contains an integer number of blocks (c_extra = 0) -- The sync period contains an integer number of blocks (c_extra = 0)
-- Determine directly whether the input bsn is expected to have a sync -- Determine directly whether the input bsn is expected to have a sync
v_expected_sync := ((v_bsn - c_start_bsn) MOD c_nof_blk = 0); v_expected_sync := ((v_bsn - c_start_bsn) MOD c_nof_blk_min = 0);
ELSE ELSE
-- The sync period contains a fractional number of blocks -- The sync period contains a fractional number of blocks
-- Determine next expected BSN with sync until the input bsn is reached using a loop -- Determine next expected BSN with sync until the input bsn is reached using a loop
WHILE v_expected_bsn < v_bsn LOOP WHILE v_expected_bsn < v_bsn LOOP
v_expected_bsn := v_expected_bsn + v_nof_blk; -- next expected BSN to have a sync v_expected_bsn := v_expected_bsn + v_nof_blk; -- next expected BSN to have a sync
v_nof_blk := c_nof_blk; v_nof_blk := c_nof_blk_min;
v_extra := v_extra - c_extra; v_accumulate := v_accumulate - c_extra;
IF v_extra < 0 THEN IF v_accumulate < 0 THEN
v_nof_blk := v_nof_blk + 1; v_nof_blk := v_nof_blk + 1;
v_extra := v_extra + c_block_size; v_accumulate := v_accumulate + c_block_size;
END IF; END IF;
END LOOP; END LOOP;
v_expected_sync := (v_bsn = v_expected_bsn); v_expected_sync := (v_bsn = v_expected_bsn);
...@@ -2386,7 +2386,7 @@ PACKAGE BODY tb_dp_pkg IS ...@@ -2386,7 +2386,7 @@ PACKAGE BODY tb_dp_pkg IS
IF verify_en = '1' THEN IF verify_en = '1' THEN
-- Debug signals, for view in Wave window -- Debug signals, for view in Wave window
dbg_nof_blk <= v_nof_blk; dbg_nof_blk <= v_nof_blk;
dbg_extra <= v_extra; dbg_accumulate <= v_accumulate;
dbg_expected_bsn <= v_expected_bsn; dbg_expected_bsn <= v_expected_bsn;
END IF; END IF;
......
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