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Commit f6dac749 authored by Daniel van der Schuur's avatar Daniel van der Schuur
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-Removed unb1_correlator.vhd from this library.

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......@@ -14,7 +14,6 @@ synth_files =
$SVN/RadioHDL/trunk/libraries/dsp/correlator/src/vhdl/corr_adder.vhd
$SVN/RadioHDL/trunk/libraries/dsp/correlator/src/vhdl/corr_accumulator.vhd
$SVN/RadioHDL/trunk/libraries/dsp/correlator/src/vhdl/correlator.vhd
$SVN/RadioHDL/trunk/libraries/dsp/correlator/src/vhdl/unb1_correlator.vhd
test_bench_files =
$SVN/RadioHDL/trunk/libraries/dsp/correlator/tb/vhdl/tb_corr_carousel.vhd
......
-------------------------------------------------------------------------------
--
-- Copyright (C) 2014
-- ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
-- JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>
-- P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
--
-- This program is free software: you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation, either version 3 of the License, or
-- (at your option) any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program. If not, see <http://www.gnu.org/licenses/>.
--
-------------------------------------------------------------------------------
-- Purpose:
-- . Feed subband data to correlator and buffer visibilities for verification.
-- Description:
-- . Block generators are used to emulate subband data. The visibilities
-- produced by the correlator are captured in data buffers.
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
ENTITY unb1_correlator IS
GENERIC (
g_stamp_date : NATURAL := 0; -- Date (YYYYMMDD)
g_stamp_time : NATURAL := 0; -- Time (HHMMSS)
g_stamp_svn : NATURAL := 0 -- SVN revision
);
PORT (
-- GENERAL
CLK : IN STD_LOGIC; -- System Clock
PPS : IN STD_LOGIC; -- System Sync
WDI : OUT STD_LOGIC; -- Watchdog Clear
-- Others
-- VERSION : IN STD_LOGIC_VECTOR(c_unb_aux.version_w-1 DOWNTO 0);
-- ID : IN STD_LOGIC_VECTOR(c_unb_aux.id_w-1 DOWNTO 0);
-- TESTIO : INOUT STD_LOGIC_VECTOR(c_unb_aux.testio_w-1 DOWNTO 0);
-- I2C Interface to Sensors
sens_sc : INOUT STD_LOGIC;
sens_sd : INOUT STD_LOGIC;
-- 1GbE Control Interface
ETH_clk : IN STD_LOGIC;
ETH_SGIN : IN STD_LOGIC;
ETH_SGOUT : OUT STD_LOGIC
);
END unb1_correlator;
ARCHITECTURE str OF unb1_correlator IS
BEGIN
-----------------------------------------------------------------------------
-- Block generators
-----------------------------------------------------------------------------
-----------------------------------------------------------------------------
-- Correlator
-----------------------------------------------------------------------------
-----------------------------------------------------------------------------
-- Data buffers
-----------------------------------------------------------------------------
-----------------------------------------------------------------------------
-- MM master
-----------------------------------------------------------------------------
-----------------------------------------------------------------------------
-- UniBoard 1 control
-----------------------------------------------------------------------------
END str;
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